drm/nouveau/gsp: add usermode class id to gpu hal
authorBen Skeggs <bskeggs@nvidia.com>
Tue, 18 Feb 2025 10:33:39 +0000 (20:33 +1000)
committerDave Airlie <airlied@redhat.com>
Sun, 18 May 2025 20:29:24 +0000 (06:29 +1000)
Use usermode class ID from nvkm_rm_gpu, instead of copying it from the
non-GSP HALs.

Signed-off-by: Ben Skeggs <bskeggs@nvidia.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Timur Tabi <ttabi@nvidia.com>
Tested-by: Timur Tabi <ttabi@nvidia.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/ad10x.c
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/ga100.c
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/ga1xx.c
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/gpu.h
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/tu1xx.c
drivers/gpu/drm/nouveau/nvkm/subdev/vfn/r535.c

index bdeaffbb1077480df564394557aef80c9c87da0d..170264d2a61b08fef9a3ce0e40a8076d1947ce30 100644 (file)
@@ -16,4 +16,6 @@ ad10x_gpu = {
                .wimm = GA102_DISP_WINDOW_IMM_CHANNEL_DMA,
                .curs = GA102_DISP_CURSOR,
        },
+
+       .usermode.class = AMPERE_USERMODE_A,
 };
index b10e6ff9e9b66d0df1e2aededccec57e9a95adac..164f46e0a93bd0ef4c83f2655676d8cbc5a8f281 100644 (file)
@@ -4,6 +4,9 @@
  */
 #include "gpu.h"
 
+#include <nvif/class.h>
+
 const struct nvkm_rm_gpu
 ga100_gpu = {
+       .usermode.class = AMPERE_USERMODE_A,
 };
index d4b67ccac608020d7852a13043e92e2b0f35dd85..f1d4778c4bc3a343958d0e6628964d7dd9665850 100644 (file)
@@ -16,4 +16,6 @@ ga1xx_gpu = {
                .wimm = GA102_DISP_WINDOW_IMM_CHANNEL_DMA,
                .curs = GA102_DISP_CURSOR,
        },
+
+       .usermode.class = AMPERE_USERMODE_A,
 };
index 7f3b5f3fd32b31f7719db644678eee53346699a4..7d005f73326e586fd74169515cb15d95945cf6f2 100644 (file)
@@ -17,6 +17,10 @@ struct nvkm_rm_gpu {
                        u32 curs;
                } class;
        } disp;
+
+       struct {
+               u32 class;
+       } usermode;
 };
 
 extern const struct nvkm_rm_gpu tu1xx_gpu;
index add98b2f3b6dcdadbc283347311b89aa1a241694..7aea54dd89aee72afc502206b0abd0d5bca93ecc 100644 (file)
@@ -16,4 +16,6 @@ tu1xx_gpu = {
                .wimm = TU102_DISP_WINDOW_IMM_CHANNEL_DMA,
                .curs = TU102_DISP_CURSOR,
        },
+
+       .usermode.class = TURING_USERMODE_A,
 };
index dce337306cab30e02ee987744144a0fae560e377..9446049642e1c60249e6967865fbde895f7d8e3a 100644 (file)
@@ -21,6 +21,8 @@
  */
 #include "priv.h"
 
+#include <rm/gpu.h>
+
 static void
 r535_vfn_dtor(struct nvkm_vfn *vfn)
 {
@@ -32,6 +34,7 @@ r535_vfn_new(const struct nvkm_vfn_func *hw,
             struct nvkm_device *device, enum nvkm_subdev_type type, int inst, u32 addr,
             struct nvkm_vfn **pvfn)
 {
+       const struct nvkm_rm_gpu *gpu = device->gsp->rm->gpu;
        struct nvkm_vfn_func *rm;
        int ret;
 
@@ -39,8 +42,12 @@ r535_vfn_new(const struct nvkm_vfn_func *hw,
                return -ENOMEM;
 
        rm->dtor = r535_vfn_dtor;
-       rm->intr = hw->intr;
-       rm->user = hw->user;
+       rm->intr = &tu102_vfn_intr,
+       rm->user.addr = 0x030000;
+       rm->user.size = 0x010000;
+       rm->user.base.minver = -1;
+       rm->user.base.maxver = -1;
+       rm->user.base.oclass = gpu->usermode.class;
 
        ret = nvkm_vfn_new_(rm, device, type, inst, addr, pvfn);
        if (ret)