spi: cadence-qspi: Improve spi memory performance

I do not know the controller enough to really understand what is
happening under the hood, but most of the supported IPs just disable
direct access without explicit reason.

In practice we observe a significant speed improvement when using
indirect mode, some kind of direct mapping, instead of DAC, Direct
ACcess. Add the relevant quirk for all boards with the same
defaults as AM654 to use INDAC (INDirect ACcess) instead.

Speed tests show no change on the write speed on a SPI NAND chip clocked
at 25MHz on the AM62A LP SK, but a read speed jumping from 3500kiB/s up
to more than 10000kiB/s (approximately x3).

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://patch.msgid.link/20250305200933.2512925-3-miquel.raynal@bootlin.com
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c
index c90462783b3f9f05e477d337ab4187224992c0a0..559fbdfbd9f73b0cc2405650592c5a9f5ae0e505 100644 (file)
--- a/drivers/spi/spi-cadence-quadspi.c
+++ b/drivers/spi/spi-cadence-quadspi.c
@@ -2073,7 +2073,7 @@ static const struct cqspi_driver_platdata k2g_qspi = {
 
 static const struct cqspi_driver_platdata am654_ospi = {
        .hwcaps_mask = CQSPI_SUPPORTS_OCTAL | CQSPI_SUPPORTS_QUAD,
-       .quirks = CQSPI_NEEDS_WR_DELAY,
+       .quirks = CQSPI_DISABLE_DAC_MODE | CQSPI_NEEDS_WR_DELAY,
 };
 
 static const struct cqspi_driver_platdata intel_lgm_qspi = {