drm/amd/display: Fix 5th display lightup on Vega10
authorRoman Li <Roman.Li@amd.com>
Wed, 17 May 2017 16:07:30 +0000 (12:07 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 26 Sep 2017 22:07:17 +0000 (18:07 -0400)
- fixing bug in calculation of reg offset for D5VGA_CONTROL

Signed-off-by: Roman Li <Roman.Li@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

index 245356e72b36413a25e96c263d195e4e48f4313d..dc8eeac6ac96d1e802a6630f1e483efb625dee1d 100644 (file)
@@ -410,7 +410,7 @@ void dce120_timing_generator_disable_vga(struct timing_generator *tg)
                break;
        case CONTROLLER_ID_D4:
                addr = mmD1VGA_CONTROL;
-               offset = mmD1VGA_CONTROL - mmD1VGA_CONTROL;
+               offset = mmD5VGA_CONTROL - mmD1VGA_CONTROL;
                break;
        case CONTROLLER_ID_D5:
                addr = mmD6VGA_CONTROL;