drm/xe: Set require_force_probe in each platform's description

Set require_force_probe explicitly in each platform's description
structure rather than embedding it within the FOO_FEATURES macros.  Even
though we expect all platforms currently supported by the Xe driver to
be under force_probe protection, this will help prepare for some other
upcoming restructuring.

Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://lore.kernel.org/r/20230406235621.1914492-3-matthew.d.roper@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index ef5a668be4499226d6745b6ff7459e132c6106f1..06c194ab56dd879d0afc3efbe6740948c74e6f6a 100644 (file)
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -121,7 +121,6 @@ static const struct xe_media_desc media_xelpmp = {
 
 /* Keep in gen based order, and chronological order within a gen */
 #define GEN12_FEATURES \
-       .require_force_probe = true, \
        .dma_mask_size = 39, \
        .max_tiles = 1, \
        .vm_max_level = 3, \
@@ -132,6 +131,7 @@ static const struct xe_device_desc tgl_desc = {
        .media = &media_xem,
        GEN12_FEATURES,
        PLATFORM(XE_TIGERLAKE),
+       .require_force_probe = true,
        .platform_engine_mask =
                BIT(XE_HW_ENGINE_RCS0) | BIT(XE_HW_ENGINE_BCS0) |
                BIT(XE_HW_ENGINE_VECS0) | BIT(XE_HW_ENGINE_VCS0) |
@@ -143,6 +143,7 @@ static const struct xe_device_desc adl_s_desc = {
        .media = &media_xem,
        GEN12_FEATURES,
        PLATFORM(XE_ALDERLAKE_S),
+       .require_force_probe = true,
        .platform_engine_mask =
                BIT(XE_HW_ENGINE_RCS0) | BIT(XE_HW_ENGINE_BCS0) |
                BIT(XE_HW_ENGINE_VECS0) | BIT(XE_HW_ENGINE_VCS0) |
@@ -156,6 +157,7 @@ static const struct xe_device_desc adl_p_desc = {
        .media = &media_xem,
        GEN12_FEATURES,
        PLATFORM(XE_ALDERLAKE_P),
+       .require_force_probe = true,
        .platform_engine_mask =
                BIT(XE_HW_ENGINE_RCS0) | BIT(XE_HW_ENGINE_BCS0) |
                BIT(XE_HW_ENGINE_VECS0) | BIT(XE_HW_ENGINE_VCS0) |
@@ -175,6 +177,7 @@ static const struct xe_device_desc dg1_desc = {
        GEN12_FEATURES,
        DGFX_FEATURES,
        PLATFORM(XE_DG1),
+       .require_force_probe = true,
        .platform_engine_mask =
                BIT(XE_HW_ENGINE_RCS0) | BIT(XE_HW_ENGINE_BCS0) |
                BIT(XE_HW_ENGINE_VECS0) | BIT(XE_HW_ENGINE_VCS0) |
@@ -182,7 +185,6 @@ static const struct xe_device_desc dg1_desc = {
 };
 
 #define XE_HP_FEATURES \
-       .require_force_probe = true, \
        .has_range_tlb_invalidation = true, \
        .has_flat_ccs = true, \
        .dma_mask_size = 46, \
@@ -208,13 +210,13 @@ static const u16 dg2_g12_ids[] = { XE_DG2_G12_IDS(NOP), 0 };
                BIT(XE_HW_ENGINE_VCS0) | BIT(XE_HW_ENGINE_VCS2) | \
                BIT(XE_HW_ENGINE_CCS0) | BIT(XE_HW_ENGINE_CCS1) | \
                BIT(XE_HW_ENGINE_CCS2) | BIT(XE_HW_ENGINE_CCS3), \
-       .require_force_probe = true, \
        .vram_flags = XE_VRAM_FLAGS_NEED64K, \
        .has_4tile = 1
 
 static const struct xe_device_desc ats_m_desc = {
        .graphics = &graphics_xehpg,
        .media = &media_xehpm,
+       .require_force_probe = true,
        XE_HP_FEATURES,
 
        DG2_FEATURES,
@@ -223,6 +225,7 @@ static const struct xe_device_desc ats_m_desc = {
 static const struct xe_device_desc dg2_desc = {
        .graphics = &graphics_xehpg,
        .media = &media_xehpm,
+       .require_force_probe = true,
        XE_HP_FEATURES,
 
        DG2_FEATURES,
@@ -254,6 +257,7 @@ static const __maybe_unused struct xe_device_desc pvc_desc = {
        XE_HP_FEATURES,
        DGFX_FEATURES,
        PLATFORM(XE_PVC),
+       .require_force_probe = true,
        .extra_gts = pvc_gts,
        .has_flat_ccs = 0,
        .platform_engine_mask = PVC_ENGINES,