drm/amd/display: disable EASF narrow filter sharpening
authorSamson Tam <Samson.Tam@amd.com>
Thu, 1 May 2025 19:59:47 +0000 (15:59 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 13 May 2025 13:31:08 +0000 (09:31 -0400)
[Why & How]
Default should be 1 to disable EASF narrow filter sharpening.

Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Samson Tam <Samson.Tam@amd.com>
Signed-off-by: Ray Wu <ray.wu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

index 002eb926cca4ac73a7f62f975b62ee062cd4d897..e0008c5f08ad234b3bb19ac39ddbcebaabafe29a 100644 (file)
@@ -1299,7 +1299,7 @@ static void spl_set_easf_data(struct spl_scratch *spl_scratch, struct spl_out *s
        if (enable_easf_v) {
                dscl_prog_data->easf_v_en = true;
                dscl_prog_data->easf_v_ring = 0;
-               dscl_prog_data->easf_v_sharp_factor = 0;
+               dscl_prog_data->easf_v_sharp_factor = 1;
                dscl_prog_data->easf_v_bf1_en = 1;      // 1-bit, BF1 calculation enable, 0=disable, 1=enable
                dscl_prog_data->easf_v_bf2_mode = 0xF;  // 4-bit, BF2 calculation mode
                /* 2-bit, BF3 chroma mode correction calculation mode */
@@ -1463,7 +1463,7 @@ static void spl_set_easf_data(struct spl_scratch *spl_scratch, struct spl_out *s
        if (enable_easf_h) {
                dscl_prog_data->easf_h_en = true;
                dscl_prog_data->easf_h_ring = 0;
-               dscl_prog_data->easf_h_sharp_factor = 0;
+               dscl_prog_data->easf_h_sharp_factor = 1;
                dscl_prog_data->easf_h_bf1_en =
                        1;      // 1-bit, BF1 calculation enable, 0=disable, 1=enable
                dscl_prog_data->easf_h_bf2_mode =