drm/amd/display: Guard Possible Null Pointer Dereference
authorSung Lee <Sung.Lee@amd.com>
Thu, 16 Jan 2025 14:45:54 +0000 (09:45 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 13 Feb 2025 02:02:59 +0000 (21:02 -0500)
[WHY]
In some situations, dc->res_pool may be null.

[HOW]
Check if pointer is null before dereference.

Reviewed-by: Joshua Aberback <joshua.aberback@amd.com>
Signed-off-by: Sung Lee <Sung.Lee@amd.com>
Signed-off-by: Zaeem Mohamed <zaeem.mohamed@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/core/dc.c

index f08d3d4673729bda5cee12d731ac7483a8362ea7..ce917714c7e082dcf8b03fa53a684c6a21867b38 100644 (file)
@@ -5611,9 +5611,11 @@ void dc_allow_idle_optimizations_internal(struct dc *dc, bool allow, char const
        if (dc->clk_mgr != NULL && dc->clk_mgr->funcs->get_hard_min_memclk)
                idle_dramclk_khz = dc->clk_mgr->funcs->get_hard_min_memclk(dc->clk_mgr);
 
-       for (i = 0; i < dc->res_pool->pipe_count; i++) {
-               pipe = &context->res_ctx.pipe_ctx[i];
-               subvp_pipe_type[i] = dc_state_get_pipe_subvp_type(context, pipe);
+       if (dc->res_pool && context) {
+               for (i = 0; i < dc->res_pool->pipe_count; i++) {
+                       pipe = &context->res_ctx.pipe_ctx[i];
+                       subvp_pipe_type[i] = dc_state_get_pipe_subvp_type(context, pipe);
+               }
        }
 
        DC_LOG_DC("%s: allow_idle=%d\n HardMinUClk_Khz=%d HardMinDramclk_Khz=%d\n Pipe_0=%d Pipe_1=%d Pipe_2=%d Pipe_3=%d Pipe_4=%d Pipe_5=%d (caller=%s)\n",