arm64: dts: qcom: msm8992: Fix SDHCI1

This commit ensures the correct IRQ type is set
and disables the device by default.
The mmc-hs400-1_8v property is also moved to
Bullhead as it might not be present on all boards.

The node has been renamed to sdhci@ instead of mmc@
and the phandle was changed to sdhc_1 to comply with
the newer DTS style.

Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Link: https://lore.kernel.org/r/20200625182118.131476-3-konradybcio@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

diff --git a/arch/arm64/boot/dts/qcom/msm8992-bullhead-rev-101.dts b/arch/arm64/boot/dts/qcom/msm8992-bullhead-rev-101.dts
index a2de69292d28c0be17053b3e9ed7404820b00b36..1061fd5404aad7650b8a9f13ddcbafe364f4b5b9 100644 (file)
--- a/arch/arm64/boot/dts/qcom/msm8992-bullhead-rev-101.dts
+++ b/arch/arm64/boot/dts/qcom/msm8992-bullhead-rev-101.dts
@@ -271,3 +271,9 @@
                };
        };
 };
+
+&sdhc_1 {
+       status = "okay";
+
+       mmc-hs400-1_8v;
+};

diff --git a/arch/arm64/boot/dts/qcom/msm8992.dtsi b/arch/arm64/boot/dts/qcom/msm8992.dtsi
index 43b2e4cd26f0944c803f61f777b38f2302b99f83..8ef1cb8ba8ef04672912f672415e7266401bb299 100644 (file)
--- a/arch/arm64/boot/dts/qcom/msm8992.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8992.dtsi
@@ -158,18 +158,19 @@
                        };
                };
 
-               sdhci1: mmc@f9824900 {
+               sdhc_1: sdhci@f9824900 {
                        compatible = "qcom,sdhci-msm-v4";
                        reg = <0xf9824900 0x1a0>, <0xf9824000 0x800>;
                        reg-names = "hc_mem", "core_mem";
 
-                       interrupts = <GIC_SPI 123 IRQ_TYPE_NONE>,
-                                       <GIC_SPI 138 IRQ_TYPE_NONE>;
+                       interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+                                       <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "hc_irq", "pwr_irq";
 
                        clocks = <&gcc GCC_SDCC1_APPS_CLK>,
-                               <&gcc GCC_SDCC1_AHB_CLK>;
-                       clock-names = "core", "iface";
+                               <&gcc GCC_SDCC1_AHB_CLK>,
+                               <&xo_board>;
+                       clock-names = "core", "iface", "xo";
 
                        pinctrl-names = "default", "sleep";
                        pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on
@@ -179,8 +180,9 @@
 
                        regulator-always-on;
                        bus-width = <8>;
-                       mmc-hs400-1_8v;
-                       status = "okay";
+                       non-removable;
+
+                       status = "disabled";
                };
 
                blsp1_uart2: serial@f991e000 {