net/mlx5e: Cleanup Flow Steering level
authorAya Levin <ayal@nvidia.com>
Thu, 21 Jan 2021 07:32:52 +0000 (09:32 +0200)
committerSaeed Mahameed <saeedm@nvidia.com>
Tue, 30 Mar 2021 04:21:52 +0000 (21:21 -0700)
Flow Steering levels are used to determine the order between the tables.
As of today, each one of these tables follows the TTC table, and hijacks
its traffic, and cannot be combined together for now. Putting them in
the same layer better reflects the situation.

Signed-off-by: Aya Levin <ayal@nvidia.com>
Reviewed-by: Tariq Toukan <tariqt@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
drivers/net/ethernet/mellanox/mlx5/core/en/fs.h
drivers/net/ethernet/mellanox/mlx5/core/fs_core.c

index a16297e7e2ace02dcbba1c5d15fb43d9b0bcd3c6..3dfec5943a33ebb642383e627307d007da9fc76b 100644 (file)
@@ -138,10 +138,10 @@ enum {
        MLX5E_TTC_FT_LEVEL,
        MLX5E_INNER_TTC_FT_LEVEL,
 #ifdef CONFIG_MLX5_EN_TLS
-       MLX5E_ACCEL_FS_TCP_FT_LEVEL,
+       MLX5E_ACCEL_FS_TCP_FT_LEVEL = MLX5E_INNER_TTC_FT_LEVEL + 1,
 #endif
 #ifdef CONFIG_MLX5_EN_ARFS
-       MLX5E_ARFS_FT_LEVEL,
+       MLX5E_ARFS_FT_LEVEL = MLX5E_INNER_TTC_FT_LEVEL + 1,
 #endif
 #ifdef CONFIG_MLX5_EN_IPSEC
        MLX5E_ACCEL_FS_ESP_FT_LEVEL = MLX5E_INNER_TTC_FT_LEVEL + 1,
index f5517ea2f6bec7c520748afd12a99c2e411818eb..d2c0e61527ab7673ec6495ddf6484441ae1ee33b 100644 (file)
 #define ETHTOOL_PRIO_NUM_LEVELS 1
 #define ETHTOOL_NUM_PRIOS 11
 #define ETHTOOL_MIN_LEVEL (KERNEL_MIN_LEVEL + ETHTOOL_NUM_PRIOS)
-/* Promiscuous, Vlan, mac, ttc, inner ttc, {aRFS/accel and esp/esp_err} */
+/* Promiscuous, Vlan, mac, ttc, inner ttc, {aRFS/accel/{esp, esp_err}} */
 #define KERNEL_NIC_PRIO_NUM_LEVELS 7
 #define KERNEL_NIC_NUM_PRIOS 1
 /* One more level for tc */