drm/amdgpu/gmc9: no need use kiq in vega10 tlb flush

two reasons:
1. there is a spinlock around;
2. vm register is pf/vf copy, vf can access via mmio safely.

Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index c069db71afaec701fccb51fc458ebc26c62ebbe6..232c20808b550b0daa16de78973275840db0176b 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -197,11 +197,11 @@ static void gmc_v9_0_gart_flush_gpu_tlb(struct amdgpu_device *adev,
                struct amdgpu_vmhub *hub = &adev->vmhub[i];
                u32 tmp = hub->get_invalidate_req(vmid);
 
-               WREG32(hub->vm_inv_eng0_req + eng, tmp);
+               WREG32_NO_KIQ(hub->vm_inv_eng0_req + eng, tmp);
 
                /* Busy wait for ACK.*/
                for (j = 0; j < 100; j++) {
-                       tmp = RREG32(hub->vm_inv_eng0_ack + eng);
+                       tmp = RREG32_NO_KIQ(hub->vm_inv_eng0_ack + eng);
                        tmp &= 1 << vmid;
                        if (tmp)
                                break;
@@ -212,7 +212,7 @@ static void gmc_v9_0_gart_flush_gpu_tlb(struct amdgpu_device *adev,
 
                /* Wait for ACK with a delay.*/
                for (j = 0; j < adev->usec_timeout; j++) {
-                       tmp = RREG32(hub->vm_inv_eng0_ack + eng);
+                       tmp = RREG32_NO_KIQ(hub->vm_inv_eng0_ack + eng);
                        tmp &= 1 << vmid;
                        if (tmp)
                                break;