arm64: dts: ls1028a: Add FlexSPI support

Add fspi node property for LS1028A SoC for FlexSPI driver.
Property added for FlexSPI controller and for the connected
slave device for the LS1028ARDB and LS1028AQDS target.
RDB and QDS are having one SPI-NOR flash device, mt35xu02g
connected at CS0.
This flash device "mt35xu02g" is tested for octal read

Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts
index 5b9d4b35dd35e48f111f99a5514c9707b81b019d..ca409d907b36e1edfb2e574053193cb07402e426 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts
@@ -123,6 +123,21 @@
        status = "okay";
 };
 
+&fspi {
+       status = "okay";
+
+       mt35xu02g0: flash@0 {
+               compatible = "jedec,spi-nor";
+               #address-cells = <1>;
+               #size-cells = <1>;
+               spi-max-frequency = <50000000>;
+               /* The following setting enables 1-1-8 (CMD-ADDR-DATA) mode */
+               spi-rx-bus-width = <8>; /* 8 SPI Rx lines */
+               spi-tx-bus-width = <1>; /* 1 SPI Tx line */
+               reg = <0>;
+       };
+};
+
 &i2c0 {
        status = "okay";
 

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts
index 9720a190049f124dc73af910fc75a1c12e626237..af25c09ea42742373679a1b00f10bb2b5bfb0e03 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts
@@ -96,6 +96,21 @@
        status = "okay";
 };
 
+&fspi {
+       status = "okay";
+
+       mt35xu02g0: flash@0 {
+               compatible = "jedec,spi-nor";
+               #address-cells = <1>;
+               #size-cells = <1>;
+               spi-max-frequency = <50000000>;
+               /* The following setting enables 1-1-8 (CMD-ADDR-DATA) mode */
+               spi-rx-bus-width = <8>; /* 8 SPI Rx lines */
+               spi-tx-bus-width = <1>; /* 1 SPI Tx line */
+               reg = <0>;
+       };
+};
+
 &i2c0 {
        status = "okay";
 

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
index 8e8a77eb596ae47afca5c62f1842b3a68c02d433..f7b79fce3df5fa6a1b47c827469f076a25a05c2b 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
@@ -271,6 +271,19 @@
                        status = "disabled";
                };
 
+               fspi: spi@20c0000 {
+                       compatible = "nxp,lx2160a-fspi";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0x0 0x20c0000 0x0 0x10000>,
+                             <0x0 0x20000000 0x0 0x10000000>;
+                       reg-names = "fspi_base", "fspi_mmap";
+                       interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clockgen 4 3>, <&clockgen 4 3>;
+                       clock-names = "fspi_en", "fspi";
+                       status = "disabled";
+               };
+
                esdhc: mmc@2140000 {
                        compatible = "fsl,ls1028a-esdhc", "fsl,esdhc";
                        reg = <0x0 0x2140000 0x0 0x10000>;