Merge branches 'fixes', 'misc' and 'spectre' into for-linus
authorRussell King <rmk+kernel@armlinux.org.uk>
Mon, 13 Aug 2018 15:28:50 +0000 (16:28 +0100)
committerRussell King <rmk+kernel@armlinux.org.uk>
Mon, 13 Aug 2018 15:28:50 +0000 (16:28 +0100)
Conflicts:
arch/arm/include/asm/uaccess.h

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
1  2  3 
arch/arm/include/asm/assembler.h
arch/arm/include/asm/uaccess.h
arch/arm/kernel/head-nommu.S
arch/arm/kernel/signal.c
arch/arm/kernel/sys_oabi-compat.c
arch/arm/vfp/vfpmodule.c

Simple merge
index 3d614e90c19f307ac04b3e625c52b6bc80b66da7,3d614e90c19f307ac04b3e625c52b6bc80b66da7,4140be43108731ba89894bd20e1e6551e350f488..5451e1f05a193c002f3b30af921975a28c232833
@@@@ -152,8 -152,8 -159,8 +159,8 @@@@ extern int __get_user_64t_4(void *)
   #define __get_user_check(x, p)                                               \
        ({                                                              \
                unsigned long __limit = current_thread_info()->addr_limit - 1; \
  -             register const typeof(*(p)) __user *__p asm("r0") = (p);\
  +             register typeof(*(p)) __user *__p asm("r0") = (p);      \
--              register typeof(x) __r2 asm("r2");                      \
++              register __inttype(x) __r2 asm("r2");                   \
                register unsigned long __l asm("r1") = __limit;         \
                register int __e asm("r0");                             \
                unsigned int __ua_flags = uaccess_save_and_enable();    \
index 7a9b86978ee1e2b917d1104138d3aa468a88bb53,724734039492c753f61cf9430065ae18fd5b2b18,2e38f85b757afa377ee3571639c99d4ebbac04a8..ec29de2500764e11ad839bda165c135f12b6a6e5
@@@@ -177,15 -185,15 -154,7 +185,15 @@@@ M_CLASS(streq  r3, [r12, #PMSAv8_MAIR1]
        bic     r0, r0, #CR_I
   #endif
        mcr     p15, 0, r0, c1, c0, 0           @ write control reg
 -      isb
 ++     instr_sync
   #elif defined (CONFIG_CPU_V7M)
  +#ifdef CONFIG_ARM_MPU
  +     ldreq   r3, [r12, MPU_CTRL]
  +     biceq   r3, #MPU_CTRL_PRIVDEFENA
  +     orreq   r3, #MPU_CTRL_ENABLE
  +     streq   r3, [r12, MPU_CTRL]
  +     isb
  +#endif
        /* For V7M systems we want to modify the CCR similarly to the SCTLR */
   #ifdef CONFIG_CPU_DCACHE_DISABLE
        bic     r0, r0, #V7M_SCB_CCR_DC
Simple merge
Simple merge
Simple merge