drm/amdgpu: Wrong order for config and counter_id parameters
authorhuangqu <jinsdb@126.com>
Wed, 26 Jan 2022 09:16:02 +0000 (17:16 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 27 Jan 2022 20:50:22 +0000 (15:50 -0500)
Wrong order for config and counter_id parameters was passed, when calling df_v3_6_pmc_set_deferred and df_v3_6_pmc_is_deferred functions.

Signed-off-by: huangqu <jinsdb@126.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/df_v3_6.c

index 43c5e3ec9a39e8c59fd4fdc4ad72adc7932349f3..f4dfca013ec5122b66d3062822cca8673ff902cf 100644 (file)
@@ -458,7 +458,7 @@ static int df_v3_6_pmc_add_cntr(struct amdgpu_device *adev,
 
 #define DEFERRED_ARM_MASK      (1 << 31)
 static int df_v3_6_pmc_set_deferred(struct amdgpu_device *adev,
-                                   int counter_idx, uint64_t config,
+                                   uint64_t config, int counter_idx,
                                    bool is_deferred)
 {
 
@@ -476,8 +476,8 @@ static int df_v3_6_pmc_set_deferred(struct amdgpu_device *adev,
 }
 
 static bool df_v3_6_pmc_is_deferred(struct amdgpu_device *adev,
-                                   int counter_idx,
-                                   uint64_t config)
+                                   uint64_t config,
+                                   int counter_idx)
 {
        return  (df_v3_6_pmc_has_counter(adev, config, counter_idx) &&
                        (adev->df_perfmon_config_assign_mask[counter_idx]