drm/amdgpu: keep vm in job instead of ib (v2)
authorMonk Liu <Monk.Liu@amd.com>
Tue, 19 Apr 2016 12:11:32 +0000 (20:11 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 11 May 2016 16:31:16 +0000 (12:31 -0400)
ib.vm is a legacy way to get vm, after scheduler
implemented vm should be get from job, and all ibs
from one job share the same vm, no need to keep ib.vm
just move vm field to job.

this patch as well add job as paramter to ib_schedule
so it can get vm from job->vm.

v2: agd: sqaush in:
drm/amdgpu: check if ring emit_vm_flush exists in vm flush

No vm flush on engines that don't support VM.

bug:
https://bugs.freedesktop.org/show_bug.cgi?id=95195

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
12 files changed:
drivers/gpu/drm/amd/amdgpu/amdgpu.h
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
drivers/gpu/drm/amd/amdgpu/cik_sdma.c
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

index e72cf4518c300672b72e1a500d47b4bca0ebe5a6..959008ad65a8744094620bc4129370470c96ef0d 100644 (file)
@@ -740,7 +740,6 @@ struct amdgpu_ib {
        uint64_t                        gpu_addr;
        uint32_t                        *ptr;
        struct amdgpu_user_fence        *user;
-       struct amdgpu_vm                *vm;
        unsigned                        vm_id;
        uint64_t                        vm_pd_addr;
        struct amdgpu_ctx               *ctx;
@@ -763,7 +762,7 @@ enum amdgpu_ring_type {
 extern const struct amd_sched_backend_ops amdgpu_sched_ops;
 
 int amdgpu_job_alloc(struct amdgpu_device *adev, unsigned num_ibs,
-                    struct amdgpu_job **job);
+                    struct amdgpu_job **job, struct amdgpu_vm *vm);
 int amdgpu_job_alloc_with_ib(struct amdgpu_device *adev, unsigned size,
                             struct amdgpu_job **job);
 
@@ -1191,7 +1190,7 @@ int amdgpu_ib_get(struct amdgpu_device *adev, struct amdgpu_vm *vm,
 void amdgpu_ib_free(struct amdgpu_device *adev, struct amdgpu_ib *ib, struct fence *f);
 int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
                       struct amdgpu_ib *ib, struct fence *last_vm_update,
-                      struct fence **f);
+                      struct amdgpu_job *job, struct fence **f);
 int amdgpu_ib_pool_init(struct amdgpu_device *adev);
 void amdgpu_ib_pool_fini(struct amdgpu_device *adev);
 int amdgpu_ib_ring_tests(struct amdgpu_device *adev);
@@ -1247,6 +1246,7 @@ struct amdgpu_cs_parser {
 struct amdgpu_job {
        struct amd_sched_job    base;
        struct amdgpu_device    *adev;
+       struct amdgpu_vm        *vm;
        struct amdgpu_ring      *ring;
        struct amdgpu_sync      sync;
        struct amdgpu_ib        *ibs;
index 2ebba295d0e4fabdd499ad2da860e75141d94a6a..1a065961981af48fe6f746201096f8186ca1b6cf 100644 (file)
@@ -120,6 +120,7 @@ static int amdgpu_cs_user_fence_chunk(struct amdgpu_cs_parser *p,
 int amdgpu_cs_parser_init(struct amdgpu_cs_parser *p, void *data)
 {
        struct amdgpu_fpriv *fpriv = p->filp->driver_priv;
+       struct amdgpu_vm *vm = &fpriv->vm;
        union drm_amdgpu_cs *cs = data;
        uint64_t *chunk_array_user;
        uint64_t *chunk_array;
@@ -214,7 +215,7 @@ int amdgpu_cs_parser_init(struct amdgpu_cs_parser *p, void *data)
                }
        }
 
-       ret = amdgpu_job_alloc(p->adev, num_ibs, &p->job);
+       ret = amdgpu_job_alloc(p->adev, num_ibs, &p->job, vm);
        if (ret)
                goto free_all_kdata;
 
index 0129617a7962ea5deb3814680c4fb0d3cb17701d..0ed6430363613818651af19fe8f646ec5e5837ed 100644 (file)
@@ -74,7 +74,6 @@ int amdgpu_ib_get(struct amdgpu_device *adev, struct amdgpu_vm *vm,
                        ib->gpu_addr = amdgpu_sa_bo_gpu_addr(ib->sa_bo);
        }
 
-       ib->vm = vm;
        ib->vm_id = 0;
 
        return 0;
@@ -117,13 +116,13 @@ void amdgpu_ib_free(struct amdgpu_device *adev, struct amdgpu_ib *ib, struct fen
  */
 int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
                       struct amdgpu_ib *ibs, struct fence *last_vm_update,
-                      struct fence **f)
+                      struct amdgpu_job *job, struct fence **f)
 {
        struct amdgpu_device *adev = ring->adev;
        struct amdgpu_ib *ib = &ibs[0];
        struct amdgpu_ctx *ctx, *old_ctx;
-       struct amdgpu_vm *vm;
        struct fence *hwf;
+       struct amdgpu_vm *vm = NULL;
        unsigned i, patch_offset = ~0;
 
        int r = 0;
@@ -132,7 +131,8 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
                return -EINVAL;
 
        ctx = ibs->ctx;
-       vm = ibs->vm;
+       if (job) /* for domain0 job like ring test, ibs->job is not assigned */
+               vm = job->vm;
 
        if (!ring->ready) {
                dev_err(adev->dev, "couldn't schedule ib\n");
@@ -174,14 +174,6 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
        old_ctx = ring->current_ctx;
        for (i = 0; i < num_ibs; ++i) {
                ib = &ibs[i];
-
-               if (ib->ctx != ctx || ib->vm != vm) {
-                       ring->current_ctx = old_ctx;
-                       if (ib->vm_id)
-                               amdgpu_vm_reset_id(adev, ib->vm_id);
-                       amdgpu_ring_undo(ring);
-                       return -EINVAL;
-               }
                amdgpu_ring_emit_ib(ring, ib);
                ring->current_ctx = ctx;
        }
index 4eea2a18d8bb7c014cbf19617989301eabb4f2b7..917c6f3bfa0949a648fa870ce9295ddf71be3f38 100644 (file)
@@ -46,7 +46,7 @@ void amdgpu_job_timeout_func(struct work_struct *work)
 }
 
 int amdgpu_job_alloc(struct amdgpu_device *adev, unsigned num_ibs,
-                    struct amdgpu_job **job)
+                    struct amdgpu_job **job, struct amdgpu_vm *vm)
 {
        size_t size = sizeof(struct amdgpu_job);
 
@@ -60,6 +60,7 @@ int amdgpu_job_alloc(struct amdgpu_device *adev, unsigned num_ibs,
                return -ENOMEM;
 
        (*job)->adev = adev;
+       (*job)->vm = vm;
        (*job)->ibs = (void *)&(*job)[1];
        (*job)->num_ibs = num_ibs;
        INIT_WORK(&(*job)->base.work_free_job, amdgpu_job_free_handler);
@@ -74,7 +75,7 @@ int amdgpu_job_alloc_with_ib(struct amdgpu_device *adev, unsigned size,
 {
        int r;
 
-       r = amdgpu_job_alloc(adev, 1, job);
+       r = amdgpu_job_alloc(adev, 1, job, NULL);
        if (r)
                return r;
 
@@ -138,7 +139,7 @@ int amdgpu_job_submit(struct amdgpu_job *job, struct amdgpu_ring *ring,
 static struct fence *amdgpu_job_dependency(struct amd_sched_job *sched_job)
 {
        struct amdgpu_job *job = to_amdgpu_job(sched_job);
-       struct amdgpu_vm *vm = job->ibs->vm;
+       struct amdgpu_vm *vm = job->vm;
 
        struct fence *fence = amdgpu_sync_get_fence(&job->sync);
 
@@ -186,7 +187,7 @@ static struct fence *amdgpu_job_run(struct amd_sched_job *sched_job)
 
        trace_amdgpu_sched_run_job(job);
        r = amdgpu_ib_schedule(job->ring, job->num_ibs, job->ibs,
-                              job->sync.last_vm_update, &fence);
+                              job->sync.last_vm_update, job, &fence);
        if (r) {
                DRM_ERROR("Error scheduling IBs (%d)\n", r);
                goto err;
index abda242980ba663b79daf1a72e8553df6eec4e88..3f953759002fee534e8d77cdef268acd0085b7e4 100644 (file)
@@ -910,7 +910,7 @@ static int amdgpu_uvd_send_msg(struct amdgpu_ring *ring, struct amdgpu_bo *bo,
        ib->length_dw = 16;
 
        if (direct) {
-               r = amdgpu_ib_schedule(ring, 1, ib, NULL, &f);
+               r = amdgpu_ib_schedule(ring, 1, ib, NULL, NULL, &f);
                job->fence = f;
                if (r)
                        goto err_free;
index 22a4d96fedb78e4e7903c8c95ddb72d0551b654f..79ba2aae0d7a696c8dbf4d10b92846862da780ab 100644 (file)
@@ -436,7 +436,7 @@ int amdgpu_vce_get_create_msg(struct amdgpu_ring *ring, uint32_t handle,
        for (i = ib->length_dw; i < ib_size_dw; ++i)
                ib->ptr[i] = 0x0;
 
-       r = amdgpu_ib_schedule(ring, 1, ib, NULL, &f);
+       r = amdgpu_ib_schedule(ring, 1, ib, NULL, NULL, &f);
        job->fence = f;
        if (r)
                goto err;
@@ -498,7 +498,7 @@ int amdgpu_vce_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle,
                ib->ptr[i] = 0x0;
 
        if (direct) {
-               r = amdgpu_ib_schedule(ring, 1, ib, NULL, &f);
+               r = amdgpu_ib_schedule(ring, 1, ib, NULL, NULL, &f);
                job->fence = f;
                if (r)
                        goto err;
index 2c3d9557e1a2a81238dc3e1cda81e4d9acd74a6b..692d0d02b644aeac6f5bc78ae4f2a438da8db878 100644 (file)
@@ -303,7 +303,8 @@ int amdgpu_vm_flush(struct amdgpu_ring *ring,
            pd_addr != AMDGPU_VM_NO_FLUSH || gds_switch_needed))
                amdgpu_ring_emit_pipeline_sync(ring);
 
-       if (pd_addr != AMDGPU_VM_NO_FLUSH) {
+       if (ring->funcs->emit_vm_flush &&
+           pd_addr != AMDGPU_VM_NO_FLUSH) {
                struct fence *fence;
 
                trace_amdgpu_vm_flush(pd_addr, ring->idx, vm_id);
index b7ed9d3760012e679f0096142a74eb4538b537cc..8d69c6555e02ec846acff1e7a367b604b1e23a2e 100644 (file)
@@ -643,7 +643,7 @@ static int cik_sdma_ring_test_ib(struct amdgpu_ring *ring)
        ib.ptr[3] = 1;
        ib.ptr[4] = 0xDEADBEEF;
        ib.length_dw = 5;
-       r = amdgpu_ib_schedule(ring, 1, &ib, NULL, &f);
+       r = amdgpu_ib_schedule(ring, 1, &ib, NULL, NULL, &f);
        if (r)
                goto err1;
 
index 6686c9c3005d9371bff153fa1f913ac42545d183..03108909a2751d4b9f8c7d6b77fce2aacf4a107d 100644 (file)
@@ -2136,7 +2136,7 @@ static int gfx_v7_0_ring_test_ib(struct amdgpu_ring *ring)
        ib.ptr[2] = 0xDEADBEEF;
        ib.length_dw = 3;
 
-       r = amdgpu_ib_schedule(ring, 1, &ib, NULL, &f);
+       r = amdgpu_ib_schedule(ring, 1, &ib, NULL, NULL, &f);
        if (r)
                goto err2;
 
index 021c17e50d51eb17b1917f01b9d8f8ff26eca923..a82945f3a5d24b0399d061e677c2e079f58aa034 100644 (file)
@@ -800,7 +800,7 @@ static int gfx_v8_0_ring_test_ib(struct amdgpu_ring *ring)
        ib.ptr[2] = 0xDEADBEEF;
        ib.length_dw = 3;
 
-       r = amdgpu_ib_schedule(ring, 1, &ib, NULL, &f);
+       r = amdgpu_ib_schedule(ring, 1, &ib, NULL, NULL, &f);
        if (r)
                goto err2;
 
@@ -1551,7 +1551,7 @@ static int gfx_v8_0_do_edc_gpr_workarounds(struct amdgpu_device *adev)
        ib.ptr[ib.length_dw++] = EVENT_TYPE(7) | EVENT_INDEX(4);
 
        /* shedule the ib on the ring */
-       r = amdgpu_ib_schedule(ring, 1, &ib, NULL, &f);
+       r = amdgpu_ib_schedule(ring, 1, &ib, NULL, NULL, &f);
        if (r) {
                DRM_ERROR("amdgpu: ib submit failed (%d).\n", r);
                goto fail;
index e6d3544fda066c958d295bb738782e938f817e0a..27ca46d16bc4a92f23699d56137a2190fa0ecd4c 100644 (file)
@@ -701,7 +701,7 @@ static int sdma_v2_4_ring_test_ib(struct amdgpu_ring *ring)
        ib.ptr[7] = SDMA_PKT_HEADER_OP(SDMA_OP_NOP);
        ib.length_dw = 8;
 
-       r = amdgpu_ib_schedule(ring, 1, &ib, NULL, &f);
+       r = amdgpu_ib_schedule(ring, 1, &ib, NULL, NULL, &f);
        if (r)
                goto err1;
 
index 00b43700c956174414462cae59e343b722aa6088..278b1fe353857ede5465e4272d3b09c32ae5d52b 100644 (file)
@@ -925,7 +925,7 @@ static int sdma_v3_0_ring_test_ib(struct amdgpu_ring *ring)
        ib.ptr[7] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP);
        ib.length_dw = 8;
 
-       r = amdgpu_ib_schedule(ring, 1, &ib, NULL, &f);
+       r = amdgpu_ib_schedule(ring, 1, &ib, NULL, NULL, &f);
        if (r)
                goto err1;