drm/msm/dpu: change ib values to u32
authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Sun, 9 Feb 2025 03:21:13 +0000 (05:21 +0200)
committerDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Wed, 5 Mar 2025 02:34:13 +0000 (04:34 +0200)
The IB values in core_perf calculations (max_per_pipe_ib,
fix_core_ib_vote) are expressed in KBps and are passed to icc_set_bw
without additional division. Change type of those values to u32.

Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/636061/
Link: https://lore.kernel.org/r/20250209-dpu-perf-rework-v5-3-87e936cf3004@linaro.org
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

index f0d490afb53be2f4bc706af91da05bb893a5fe34..7263ab63a692554cd51a7fd91bd6250330179240 100644 (file)
@@ -135,7 +135,7 @@ static void _dpu_core_perf_calc_crtc(const struct dpu_core_perf *core_perf,
        }
 
        DRM_DEBUG_ATOMIC(
-               "crtc=%d clk_rate=%llu core_ib=%llu core_ab=%llu\n",
+               "crtc=%d clk_rate=%llu core_ib=%u core_ab=%llu\n",
                        crtc->base.id, perf->core_clk_rate,
                        perf->max_per_pipe_ib, perf->bw_ctl);
 }
@@ -477,7 +477,7 @@ int dpu_core_perf_debugfs_init(struct dpu_kms *dpu_kms, struct dentry *parent)
                        (u32 *)perf, &dpu_core_perf_mode_fops);
        debugfs_create_u64("fix_core_clk_rate", 0600, entry,
                        &perf->fix_core_clk_rate);
-       debugfs_create_u64("fix_core_ib_vote", 0600, entry,
+       debugfs_create_u32("fix_core_ib_vote", 0600, entry,
                        &perf->fix_core_ib_vote);
        debugfs_create_u64("fix_core_ab_vote", 0600, entry,
                        &perf->fix_core_ab_vote);
index 451bf8021114d9d4a2dfdbb81ed4150fc559c681..e2ab7b3a8246c11f844d25c64354526ad162e15c 100644 (file)
@@ -19,7 +19,7 @@
  * @core_clk_rate: core clock rate request
  */
 struct dpu_core_perf_params {
-       u64 max_per_pipe_ib;
+       u32 max_per_pipe_ib;
        u64 bw_ctl;
        u64 core_clk_rate;
 };
@@ -40,7 +40,7 @@ struct dpu_core_perf_tune {
  * @perf_tune: debug control for performance tuning
  * @enable_bw_release: debug control for bandwidth release
  * @fix_core_clk_rate: fixed core clock request in Hz used in mode 2
- * @fix_core_ib_vote: fixed core ib vote in bps used in mode 2
+ * @fix_core_ib_vote: fixed core ib vote in KBps used in mode 2
  * @fix_core_ab_vote: fixed core ab vote in bps used in mode 2
  */
 struct dpu_core_perf {
@@ -50,7 +50,7 @@ struct dpu_core_perf {
        struct dpu_core_perf_tune perf_tune;
        u32 enable_bw_release;
        u64 fix_core_clk_rate;
-       u64 fix_core_ib_vote;
+       u32 fix_core_ib_vote;
        u64 fix_core_ab_vote;
 };
 
index b8e1a8f2aad57a6fa83e8a9e0caeae704cadf54e..6e3e9162222afc15766061b2f3d37842819f8db7 100644 (file)
@@ -1680,7 +1680,7 @@ static int dpu_crtc_debugfs_state_show(struct seq_file *s, void *v)
        seq_printf(s, "core_clk_rate: %llu\n",
                        dpu_crtc->cur_perf.core_clk_rate);
        seq_printf(s, "bw_ctl: %llu\n", dpu_crtc->cur_perf.bw_ctl);
-       seq_printf(s, "max_per_pipe_ib: %llu\n",
+       seq_printf(s, "max_per_pipe_ib: %u\n",
                                dpu_crtc->cur_perf.max_per_pipe_ib);
 
        return 0;