ARM: dts: bcm: Align L2 cache-controller nodename with dtschema
authorKrzysztof Kozlowski <krzk@kernel.org>
Fri, 26 Jun 2020 08:06:46 +0000 (10:06 +0200)
committerFlorian Fainelli <f.fainelli@gmail.com>
Tue, 7 Jul 2020 04:55:57 +0000 (21:55 -0700)
Fix dtschema validator warnings like:
    l2-cache@22000: $nodename:0:
        'l2-cache@22000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
arch/arm/boot/dts/bcm-cygnus.dtsi
arch/arm/boot/dts/bcm-hr2.dtsi
arch/arm/boot/dts/bcm-nsp.dtsi
arch/arm/boot/dts/bcm21664.dtsi

index 1bc45cfd545385c640fdf2c17b6c9da2e08af2c8..35bdd0969f0aba743aa7f7af5016cdaecfecd094 100644 (file)
@@ -91,7 +91,7 @@
                              <0x20100 0x100>;
                };
 
-               L2: l2-cache@22000 {
+               L2: cache-controller@22000 {
                        compatible = "arm,pl310-cache";
                        reg = <0x22000 0x1000>;
                        cache-unified;
index 5e5f5ca3c86f1654e457b0608faf0b3985b7babc..cbebed5f050eb09a29b3134f5ff9848f07ce42b8 100644 (file)
                              <0x20100 0x100>;
                };
 
-               L2: l2-cache@22000 {
+               L2: cache-controller@22000 {
                        compatible = "arm,pl310-cache";
                        reg = <0x22000 0x1000>;
                        cache-unified;
index da6d70f09ef19b4dd480c5d98b4b8b73cc80d1dc..1c4a46e350e3a9efa5335f52607cffdc1632af65 100644 (file)
                              <0x20100 0x100>;
                };
 
-               L2: l2-cache@22000 {
+               L2: cache-controller@22000 {
                        compatible = "arm,pl310-cache";
                        reg = <0x22000 0x1000>;
                        cache-unified;
index 3cf66faf3b56833d775a813f4e8257ce64890955..58ec1b2f8ef66382f03af515167ec70c1448df2c 100644 (file)
@@ -90,7 +90,7 @@
                reg-io-width = <4>;
        };
 
-       L2: l2-cache@3ff20000 {
+       L2: cache-controller@3ff20000 {
                compatible = "arm,pl310-cache";
                reg = <0x3ff20000 0x1000>;
                cache-unified;