i40e: link_down_on_close private flag support
authorMariusz Stachura <mariusz.stachura@intel.com>
Tue, 14 Nov 2017 12:00:50 +0000 (07:00 -0500)
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>
Mon, 26 Feb 2018 19:48:06 +0000 (11:48 -0800)
This patch introduces new ethtool private flag used for
forcing true link state. Function i40e_force_link_state that implements
this functionality was added, it sets phy_type = 0 in order to
work-around firmware's LESM. False positive error messages were
suppressed.

The ndo_open() should not succeed if there were issues with forcing link
state to be UP.

Added I40E_PHY_TYPES_BITMASK define with all phy types OR-ed together in
one bitmask.  Added after phy type definition, so it will be hard to
forget to include new phy types to the bitmask.

Signed-off-by: Mariusz Stachura <mariusz.stachura@intel.com>
Signed-off-by: Mitch Williams <mitch.a.williams@intel.com>
Tested-by: Andrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h
drivers/net/ethernet/intel/i40e/i40e_ethtool.c
drivers/net/ethernet/intel/i40e/i40e_main.c

index a852775d30592d78a016f5b40027bd45701f1ee4..0dfc52772c45749b21eb62c472e09977b461649e 100644 (file)
@@ -1914,6 +1914,43 @@ enum i40e_aq_phy_type {
        I40E_PHY_TYPE_DEFAULT                   = 0xFF,
 };
 
+#define I40E_PHY_TYPES_BITMASK (BIT_ULL(I40E_PHY_TYPE_SGMII) | \
+                               BIT_ULL(I40E_PHY_TYPE_1000BASE_KX) | \
+                               BIT_ULL(I40E_PHY_TYPE_10GBASE_KX4) | \
+                               BIT_ULL(I40E_PHY_TYPE_10GBASE_KR) | \
+                               BIT_ULL(I40E_PHY_TYPE_40GBASE_KR4) | \
+                               BIT_ULL(I40E_PHY_TYPE_XAUI) | \
+                               BIT_ULL(I40E_PHY_TYPE_XFI) | \
+                               BIT_ULL(I40E_PHY_TYPE_SFI) | \
+                               BIT_ULL(I40E_PHY_TYPE_XLAUI) | \
+                               BIT_ULL(I40E_PHY_TYPE_XLPPI) | \
+                               BIT_ULL(I40E_PHY_TYPE_40GBASE_CR4_CU) | \
+                               BIT_ULL(I40E_PHY_TYPE_10GBASE_CR1_CU) | \
+                               BIT_ULL(I40E_PHY_TYPE_10GBASE_AOC) | \
+                               BIT_ULL(I40E_PHY_TYPE_40GBASE_AOC) | \
+                               BIT_ULL(I40E_PHY_TYPE_UNRECOGNIZED) | \
+                               BIT_ULL(I40E_PHY_TYPE_UNSUPPORTED) | \
+                               BIT_ULL(I40E_PHY_TYPE_100BASE_TX) | \
+                               BIT_ULL(I40E_PHY_TYPE_1000BASE_T) | \
+                               BIT_ULL(I40E_PHY_TYPE_10GBASE_T) | \
+                               BIT_ULL(I40E_PHY_TYPE_10GBASE_SR) | \
+                               BIT_ULL(I40E_PHY_TYPE_10GBASE_LR) | \
+                               BIT_ULL(I40E_PHY_TYPE_10GBASE_SFPP_CU) | \
+                               BIT_ULL(I40E_PHY_TYPE_10GBASE_CR1) | \
+                               BIT_ULL(I40E_PHY_TYPE_40GBASE_CR4) | \
+                               BIT_ULL(I40E_PHY_TYPE_40GBASE_SR4) | \
+                               BIT_ULL(I40E_PHY_TYPE_40GBASE_LR4) | \
+                               BIT_ULL(I40E_PHY_TYPE_1000BASE_SX) | \
+                               BIT_ULL(I40E_PHY_TYPE_1000BASE_LX) | \
+                               BIT_ULL(I40E_PHY_TYPE_1000BASE_T_OPTICAL) | \
+                               BIT_ULL(I40E_PHY_TYPE_20GBASE_KR2) | \
+                               BIT_ULL(I40E_PHY_TYPE_25GBASE_KR) | \
+                               BIT_ULL(I40E_PHY_TYPE_25GBASE_CR) | \
+                               BIT_ULL(I40E_PHY_TYPE_25GBASE_SR) | \
+                               BIT_ULL(I40E_PHY_TYPE_25GBASE_LR) | \
+                               BIT_ULL(I40E_PHY_TYPE_25GBASE_AOC) | \
+                               BIT_ULL(I40E_PHY_TYPE_25GBASE_ACC))
+
 #define I40E_LINK_SPEED_100MB_SHIFT    0x1
 #define I40E_LINK_SPEED_1000MB_SHIFT   0x2
 #define I40E_LINK_SPEED_10GB_SHIFT     0x3
index 0dcbbda164c47789516cbc1402d5e7e0c8a845f2..89807e32a8983e587a1a4c67a7ad51460ca0668b 100644 (file)
@@ -230,6 +230,8 @@ static const struct i40e_priv_flags i40e_gstrings_priv_flags[] = {
        I40E_PRIV_FLAG("flow-director-atr", I40E_FLAG_FD_ATR_ENABLED, 0),
        I40E_PRIV_FLAG("veb-stats", I40E_FLAG_VEB_STATS_ENABLED, 0),
        I40E_PRIV_FLAG("hw-atr-eviction", I40E_FLAG_HW_ATR_EVICT_ENABLED, 0),
+       I40E_PRIV_FLAG("link-down-on-close",
+                      I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED, 0),
        I40E_PRIV_FLAG("legacy-rx", I40E_FLAG_LEGACY_RX, 0),
        I40E_PRIV_FLAG("disable-source-pruning",
                       I40E_FLAG_SOURCE_PRUNING_DISABLED, 0),
index f6d37456f3b72f157605af23d0f70eaaa64eaf8e..be9a1467a1a1d09e81d97c1da3c7e6de6f7d20ea 100644 (file)
@@ -6546,6 +6546,75 @@ int i40e_up(struct i40e_vsi *vsi)
        return err;
 }
 
+/**
+ * i40e_force_link_state - Force the link status
+ * @pf: board private structure
+ * @is_up: whether the link state should be forced up or down
+ **/
+static i40e_status i40e_force_link_state(struct i40e_pf *pf, bool is_up)
+{
+       struct i40e_aq_get_phy_abilities_resp abilities;
+       struct i40e_aq_set_phy_config config = {0};
+       struct i40e_hw *hw = &pf->hw;
+       i40e_status err;
+       u64 mask;
+
+       /* Get the current phy config */
+       err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities,
+                                          NULL);
+       if (err) {
+               dev_err(&pf->pdev->dev,
+                       "failed to get phy cap., ret =  %s last_status =  %s\n",
+                       i40e_stat_str(hw, err),
+                       i40e_aq_str(hw, hw->aq.asq_last_status));
+               return err;
+       }
+
+       /* If link needs to go up, but was not forced to go down,
+        * no need for a flap
+        */
+       if (is_up && abilities.phy_type != 0)
+               return I40E_SUCCESS;
+
+       /* To force link we need to set bits for all supported PHY types,
+        * but there are now more than 32, so we need to split the bitmap
+        * across two fields.
+        */
+       mask = I40E_PHY_TYPES_BITMASK;
+       config.phy_type = is_up ? cpu_to_le32((u32)(mask & 0xffffffff)) : 0;
+       config.phy_type_ext = is_up ? (u8)((mask >> 32) & 0xff) : 0;
+       /* Copy the old settings, except of phy_type */
+       config.abilities = abilities.abilities;
+       config.link_speed = abilities.link_speed;
+       config.eee_capability = abilities.eee_capability;
+       config.eeer = abilities.eeer_val;
+       config.low_power_ctrl = abilities.d3_lpan;
+       err = i40e_aq_set_phy_config(hw, &config, NULL);
+
+       if (err) {
+               dev_err(&pf->pdev->dev,
+                       "set phy config ret =  %s last_status =  %s\n",
+                       i40e_stat_str(&pf->hw, err),
+                       i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
+               return err;
+       }
+
+       /* Update the link info */
+       err = i40e_update_link_info(hw);
+       if (err) {
+               /* Wait a little bit (on 40G cards it sometimes takes a really
+                * long time for link to come back from the atomic reset)
+                * and try once more
+                */
+               msleep(1000);
+               i40e_update_link_info(hw);
+       }
+
+       i40e_aq_set_link_restart_an(hw, true, NULL);
+
+       return I40E_SUCCESS;
+}
+
 /**
  * i40e_down - Shutdown the connection processing
  * @vsi: the VSI being stopped
@@ -6563,6 +6632,9 @@ void i40e_down(struct i40e_vsi *vsi)
        }
        i40e_vsi_disable_irq(vsi);
        i40e_vsi_stop_rings(vsi);
+       if (vsi->type == I40E_VSI_MAIN &&
+           vsi->back->flags & I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED)
+               i40e_force_link_state(vsi->back, false);
        i40e_napi_disable_all(vsi);
 
        for (i = 0; i < vsi->num_queue_pairs; i++) {
@@ -7524,6 +7596,9 @@ int i40e_open(struct net_device *netdev)
 
        netif_carrier_off(netdev);
 
+       if (i40e_force_link_state(pf, true))
+               return -EAGAIN;
+
        err = i40e_vsi_open(vsi);
        if (err)
                return err;