amdgpu_device_set_cg_state(adev, AMD_CG_STATE_UNGATE);
amdgpu_amdkfd_suspend(adev, false);
+#ifdef CONFIG_DRM_AMDGPU_NAVI3X_USERQ
+ amdgpu_userq_suspend(adev);
+#endif
/* Workaround for ASICs need to disable SMC first */
amdgpu_device_smu_fini_early(adev);
amdgpu_device_ip_suspend_phase1(adev);
- if (!adev->in_s0ix)
+ if (!adev->in_s0ix) {
amdgpu_amdkfd_suspend(adev, adev->in_runpm);
+#ifdef CONFIG_DRM_AMDGPU_NAVI3X_USERQ
+ amdgpu_userq_suspend(adev);
+#endif
+ }
r = amdgpu_device_evict_resources(adev);
if (r)
r = amdgpu_amdkfd_resume(adev, adev->in_runpm);
if (r)
goto exit;
+#ifdef CONFIG_DRM_AMDGPU_NAVI3X_USERQ
+ r = amdgpu_userq_resume(adev);
+ if (r)
+ goto exit;
+#endif
}
r = amdgpu_device_ip_late_init(adev);