drm/amdgpu: fix the indentation

fix the indentation
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c:6992 gfx_v11_ip_dump

compiler: gcc-11 (Debian 11.3.0-12) 11.3.0

Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@linaro.org>
Closes: https://lore.kernel.org/r/202505071619.7sHTLpNg-lkp@intel.com/
Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Reviewed-by: Arvind Yadav <Arvind.Yadav@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
index 3f4ee4b3b0a44ba3ba50c349ae1130655a4a5287..afd6d59164bfa364e1521e5f7d5fd98328eac3ae 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
@@ -7094,9 +7094,12 @@ static void gfx_v11_ip_dump(struct amdgpu_ip_block *ip_block)
                                /* ME0 is for GFX so start from 1 for CP */
                                soc21_grbm_select(adev, adev->gfx.me.num_me + i, j, k, 0);
                                for (reg = 0; reg < reg_count; reg++) {
-                                       if (i && gc_cp_reg_list_11[reg].reg_offset == regCP_MEC_ME1_HEADER_DUMP)
-                                       adev->gfx.ip_dump_compute_queues[index + reg] =
-                                               RREG32(SOC15_REG_OFFSET(GC, 0, regCP_MEC_ME2_HEADER_DUMP));
+                                       if (i &&
+                                           gc_cp_reg_list_11[reg].reg_offset ==
+                                                   regCP_MEC_ME1_HEADER_DUMP)
+                                               adev->gfx.ip_dump_compute_queues[index + reg] =
+                                                       RREG32(SOC15_REG_OFFSET(GC, 0,
+                                                              regCP_MEC_ME2_HEADER_DUMP));
                                        else
                                                adev->gfx.ip_dump_compute_queues[index + reg] =
                                                        RREG32(SOC15_REG_ENTRY_OFFSET(