drm/xe/oa: Add missing VISACTL mux registers
authorAshutosh Dixit <ashutosh.dixit@intel.com>
Sat, 11 Jan 2025 02:15:39 +0000 (18:15 -0800)
committerAshutosh Dixit <ashutosh.dixit@intel.com>
Mon, 13 Jan 2025 23:11:02 +0000 (15:11 -0800)
Add missing VISACTL mux registers required for some OA
config's (e.g. RenderPipeCtrl).

Fixes: cdf02fe1a94a ("drm/xe/oa/uapi: Add/remove OA config perf ops")
Cc: stable@vger.kernel.org
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250111021539.2920346-1-ashutosh.dixit@intel.com
drivers/gpu/drm/xe/xe_oa.c

index 4e00a77289c50ef89f6cb55ec0832f1ab8c55331..eeb96b5f49e2af92ed51458035b0c78afa6bf85e 100644 (file)
@@ -2163,6 +2163,7 @@ static const struct xe_mmio_range xe2_oa_mux_regs[] = {
        { .start = 0x5194, .end = 0x5194 },     /* SYS_MEM_LAT_MEASURE_MERTF_GRP_3D */
        { .start = 0x8704, .end = 0x8704 },     /* LMEM_LAT_MEASURE_MCFG_GRP */
        { .start = 0xB1BC, .end = 0xB1BC },     /* L3_BANK_LAT_MEASURE_LBCF_GFX */
+       { .start = 0xD0E0, .end = 0xD0F4 },     /* VISACTL */
        { .start = 0xE18C, .end = 0xE18C },     /* SAMPLER_MODE */
        { .start = 0xE590, .end = 0xE590 },     /* TDL_LSC_LAT_MEASURE_TDL_GFX */
        { .start = 0x13000, .end = 0x137FC },   /* PES_0_PESL0 - PES_63_UPPER_PESL3 */