drm/amd/display: Send PQ bit in AMD VSIF

[WHY & HOW]
PB9 bit 5 was added to signal PQ EOTF in AMD vendor specific infoframe.
This change sets it when appropriate.

Reviewed-by: Aric Cyr <aric.cyr@amd.com>
Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Krunoslav Kovac <krunoslav.kovac@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/modules/freesync/freesync.c b/drivers/gpu/drm/amd/display/modules/freesync/freesync.c
index ccecddafeb05cb4980c469643a7483cdfcc44773..47296d155c3a5ab8ef0e376dc7d1c2452477d2cd 100644 (file)
--- a/drivers/gpu/drm/amd/display/modules/freesync/freesync.c
+++ b/drivers/gpu/drm/amd/display/modules/freesync/freesync.c
@@ -693,10 +693,12 @@ static void build_vrr_infopacket_fs2_data(enum color_transfer_func app_tf,
        if (app_tf != TRANSFER_FUNC_UNKNOWN) {
                infopacket->valid = true;
 
-               if (app_tf != TRANSFER_FUNC_PQ2084) {
+               if (app_tf == TRANSFER_FUNC_PQ2084)
+                       infopacket->sb[9] |= 0x20; // PB9 = [Bit 5 = PQ EOTF Active]
+               else {
                        infopacket->sb[6] |= 0x08;  // PB6 = [Bit 3 = Native Color Active]
                        if (app_tf == TRANSFER_FUNC_GAMMA_22)
-                               infopacket->sb[9] |= 0x04;  // PB6 = [Bit 2 = Gamma 2.2 EOTF Active]
+                               infopacket->sb[9] |= 0x04;  // PB9 = [Bit 2 = Gamma 2.2 EOTF Active]
                }
        }
 }