drm/i915/pmu: Cheat when reading the actual frequency to avoid fw

We want to avoid taking forcewake when querying the performance stats,
as we wish to avoid perturbing the system under observation. (And with
the forcewake being kept alive for 1ms after use, sampling the frequency
from a 200Hz timer keeps forcewake 40% active.)

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191108103511.20951-1-chris@chris-wilson.co.uk

diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
index 05395015d1f2c698d70ce21f4e57a5642ece30d7..8e74f40413b8af168b230ee26686a0c95db100de 100644 (file)
--- a/drivers/gpu/drm/i915/i915_pmu.c
+++ b/drivers/gpu/drm/i915/i915_pmu.c
@@ -366,8 +366,21 @@ frequency_sample(struct intel_gt *gt, unsigned int period_ns)
 
                val = rps->cur_freq;
                if (intel_gt_pm_get_if_awake(gt)) {
-                       val = intel_uncore_read_notrace(uncore, GEN6_RPSTAT1);
-                       val = intel_get_cagf(rps, val);
+                       u32 stat;
+
+                       /*
+                        * We take a quick peek here without using forcewake
+                        * so that we don't perturb the system under observation
+                        * (forcewake => !rc6 => increased power use). We expect
+                        * that if the read fails because it is outside of the
+                        * mmio power well, then it will return 0 -- in which
+                        * case we assume the system is running at the intended
+                        * frequency. Fortunately, the read should rarely fail!
+                        */
+                       stat = intel_uncore_read_fw(uncore, GEN6_RPSTAT1);
+                       if (stat)
+                               val = intel_get_cagf(rps, stat);
+
                        intel_gt_pm_put(gt);
                }