drm/msm/dp: Account for LTTPRs capabilities

Take into account LTTPR capabilities when selecting maximum allowed
link rate, number of data lines.

Fixes: 72d0af4accd9 ("drm/msm/dp: Add support for LTTPR handling")
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Aleksandrs Vinarskis <alex.vinarskis@gmail.com>
Tested-by: Jessica Zhang <quic_jesszhan@quicinc.com> # SA8775P
Tested-by: Johan Hovold <johan+linaro@kernel.org>
Tested-by: Rob Clark <robdclark@gmail.com>
Patchwork: https://patchwork.freedesktop.org/patch/652302/
Link: https://lore.kernel.org/r/20250507230113.14270-3-alex.vinarskis@gmail.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>

diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c
index c39c1669c74c0c6a1bcdee05cda1cc26b3fa7e7d..ba08350cd9c5918f2d83d1c2b5766d86edc690a7 100644 (file)
--- a/drivers/gpu/drm/msm/dp/dp_display.c
+++ b/drivers/gpu/drm/msm/dp/dp_display.c
@@ -362,13 +362,12 @@ static int msm_dp_display_send_hpd_notification(struct msm_dp_display_private *d
 
 static void msm_dp_display_lttpr_init(struct msm_dp_display_private *dp, u8 *dpcd)
 {
-       u8 lttpr_caps[DP_LTTPR_COMMON_CAP_SIZE];
        int rc;
 
-       if (drm_dp_read_lttpr_common_caps(dp->aux, dpcd, lttpr_caps))
+       if (drm_dp_read_lttpr_common_caps(dp->aux, dpcd, dp->link->lttpr_common_caps))
                return;
 
-       rc = drm_dp_lttpr_init(dp->aux, drm_dp_lttpr_count(lttpr_caps));
+       rc = drm_dp_lttpr_init(dp->aux, drm_dp_lttpr_count(dp->link->lttpr_common_caps));
        if (rc)
                DRM_ERROR("failed to set LTTPRs transparency mode, rc=%d\n", rc);
 }

diff --git a/drivers/gpu/drm/msm/dp/dp_link.h b/drivers/gpu/drm/msm/dp/dp_link.h
index 8db5d5698a97cf9997287270b54c386c760e067d..c47d75cfc720c9fac31e6eb3e82601a9e922ce51 100644 (file)
--- a/drivers/gpu/drm/msm/dp/dp_link.h
+++ b/drivers/gpu/drm/msm/dp/dp_link.h
@@ -7,6 +7,7 @@
 #define _DP_LINK_H_
 
 #include "dp_aux.h"
+#include <drm/display/drm_dp_helper.h>
 
 #define DS_PORT_STATUS_CHANGED 0x200
 #define DP_TEST_BIT_DEPTH_UNKNOWN 0xFFFFFFFF
@@ -60,6 +61,8 @@ struct msm_dp_link_phy_params {
 };
 
 struct msm_dp_link {
+       u8 lttpr_common_caps[DP_LTTPR_COMMON_CAP_SIZE];
+
        u32 sink_request;
        u32 test_response;
 

diff --git a/drivers/gpu/drm/msm/dp/dp_panel.c b/drivers/gpu/drm/msm/dp/dp_panel.c
index 92415bf8aa16655a6cf4f7d6f8a5896275edf001..4e8ab75c771b1e3a2d62f75e9993e1062118482b 100644 (file)
--- a/drivers/gpu/drm/msm/dp/dp_panel.c
+++ b/drivers/gpu/drm/msm/dp/dp_panel.c
@@ -47,7 +47,7 @@ static void msm_dp_panel_read_psr_cap(struct msm_dp_panel_private *panel)
 
 static int msm_dp_panel_read_dpcd(struct msm_dp_panel *msm_dp_panel)
 {
-       int rc;
+       int rc, max_lttpr_lanes, max_lttpr_rate;
        struct msm_dp_panel_private *panel;
        struct msm_dp_link_info *link_info;
        u8 *dpcd, major, minor;
@@ -75,6 +75,16 @@ static int msm_dp_panel_read_dpcd(struct msm_dp_panel *msm_dp_panel)
        if (link_info->rate > msm_dp_panel->max_dp_link_rate)
                link_info->rate = msm_dp_panel->max_dp_link_rate;
 
+       /* Limit data lanes from LTTPR capabilities, if any */
+       max_lttpr_lanes = drm_dp_lttpr_max_lane_count(panel->link->lttpr_common_caps);
+       if (max_lttpr_lanes && max_lttpr_lanes < link_info->num_lanes)
+               link_info->num_lanes = max_lttpr_lanes;
+
+       /* Limit link rate from LTTPR capabilities, if any */
+       max_lttpr_rate = drm_dp_lttpr_max_link_rate(panel->link->lttpr_common_caps);
+       if (max_lttpr_rate && max_lttpr_rate < link_info->rate)
+               link_info->rate = max_lttpr_rate;
+
        drm_dbg_dp(panel->drm_dev, "version: %d.%d\n", major, minor);
        drm_dbg_dp(panel->drm_dev, "link_rate=%d\n", link_info->rate);
        drm_dbg_dp(panel->drm_dev, "lane_count=%d\n", link_info->num_lanes);