arm64: dts: mediatek: mt8188: Update vppsys node names to syscon

The MediaTek mmsys is more than just a clock controller; it's a
system controller. In addition to clock controls, it provides display
pipeline routing controls and other miscellaneous control registers.

On the MT8188 and MT8195 SoCs, the mmsys blocks utilize the same mmsys
driver but have been aliased to "vdosys" and "vppsys", likely to better
represent their actual functionality.

Update the vppsys node names and compatibles in MT8188 DT to reflect
that and fix dtbs_check errors against mediatek/mt8188-evb.dtb.

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Fei Shao <fshao@chromium.org>
Reviewed-by: Fei Shao <fshao@chromium.org>
Link: https://lore.kernel.org/r/20241001113052.3124869-7-fshao@chromium.org
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

diff --git a/arch/arm64/boot/dts/mediatek/mt8188.dtsi b/arch/arm64/boot/dts/mediatek/mt8188.dtsi
index ba9c0ca91b04bcec458fe37a2f03a85e1a5447de..b159f9b11fe6e94c62e8324b4f68a338f0cc37af 100644 (file)
--- a/arch/arm64/boot/dts/mediatek/mt8188.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8188.dtsi
@@ -1779,8 +1779,8 @@
                        #clock-cells = <1>;
                };
 
-               vppsys0: clock-controller@14000000 {
-                       compatible = "mediatek,mt8188-vppsys0";
+               vppsys0: syscon@14000000 {
+                       compatible = "mediatek,mt8188-vppsys0", "syscon";
                        reg = <0 0x14000000 0 0x1000>;
                        #clock-cells = <1>;
                };
@@ -1797,8 +1797,8 @@
                        #clock-cells = <1>;
                };
 
-               vppsys1: clock-controller@14f00000 {
-                       compatible = "mediatek,mt8188-vppsys1";
+               vppsys1: syscon@14f00000 {
+                       compatible = "mediatek,mt8188-vppsys1", "syscon";
                        reg = <0 0x14f00000 0 0x1000>;
                        #clock-cells = <1>;
                };