perf vendor events arm64: AmpereOne/AmpereOneX: Mark LD_RETIRED impacted by errata
authorIlkka Koskinen <ilkka@os.amperecomputing.com>
Thu, 13 Mar 2025 20:15:58 +0000 (20:15 +0000)
committerNamhyung Kim <namhyung@kernel.org>
Fri, 21 Mar 2025 05:58:57 +0000 (22:58 -0700)
Atomic instructions are both memory-reading and memory-writing
instructions and so should be counted by both LD_RETIRED and ST_RETIRED
performance monitoring events. However LD_RETIRED does not count atomic
instructions.

Signed-off-by: Ilkka Koskinen <ilkka@os.amperecomputing.com>
Reviewed-by: James Clark <james.clark@linaro.org>
Link: https://lore.kernel.org/r/20250313201559.11332-2-ilkka@os.amperecomputing.com
Signed-off-by: Namhyung Kim <namhyung@kernel.org>
tools/perf/pmu-events/arch/arm64/ampere/ampereone/memory.json
tools/perf/pmu-events/arch/arm64/ampere/ampereonex/memory.json

index 0711782bfa6bc4a2daf398fa835ddaf291b9a53d..13382d29b25f0a784c6384a82cfeb1cb5182a0d1 100644 (file)
@@ -1,6 +1,8 @@
 [
     {
-        "ArchStdEvent": "LD_RETIRED"
+        "ArchStdEvent": "LD_RETIRED",
+        "Errata": "Errata AC03_CPU_52",
+        "BriefDescription": "Instruction architecturally executed, condition code check pass, load. Impacted by errata -"
     },
     {
         "ArchStdEvent": "MEM_ACCESS_RD"
index a211d94aacde6b5e9e4c7f7fbe90b8dd507ac8cc..6c06bc928415de2aa2490a3fdb992292047c64ca 100644 (file)
@@ -1,6 +1,8 @@
 [
     {
-        "ArchStdEvent": "LD_RETIRED"
+        "ArchStdEvent": "LD_RETIRED",
+        "Errata": "Errata AC04_CPU_21",
+        "BriefDescription": "Instruction architecturally executed, condition code check pass, load. Impacted by errata -"
     },
     {
         "ArchStdEvent": "MEM_ACCESS_RD"