riscv: dts: renesas: Convert isa detection to new properties
authorConor Dooley <conor.dooley@microchip.com>
Mon, 9 Oct 2023 09:37:48 +0000 (10:37 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 13 Nov 2023 13:35:36 +0000 (14:35 +0100)
Convert the RZ/Five devicetrees to use the new properties
"riscv,isa-base" & "riscv,isa-extensions".
For compatibility with other projects, "riscv,isa" remains.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20231009-smog-gag-3ba67e68126b@wendy
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
arch/riscv/boot/dts/renesas/r9a07g043f.dtsi

index b0796015e36b1bfdbe3ce6caedd8362a453974ac..a92cfcfc021b4c3847a48828a45948da169c882f 100644 (file)
                        reg = <0x0>;
                        status = "okay";
                        riscv,isa = "rv64imafdc";
+                       riscv,isa-base = "rv64i";
+                       riscv,isa-extensions = "i", "m", "a", "f", "d", "c",
+                                              "zicntr", "zicsr", "zifencei",
+                                              "zihpm";
                        mmu-type = "riscv,sv39";
                        i-cache-size = <0x8000>;
                        i-cache-line-size = <0x40>;