drm/panfrost: Force AARCH64_4K page table format on MediaTek MT8192
authorAriel D'Alessandro <ariel.dalessandro@collabora.com>
Mon, 24 Mar 2025 18:58:01 +0000 (15:58 -0300)
committerSteven Price <steven.price@arm.com>
Mon, 31 Mar 2025 11:12:55 +0000 (12:12 +0100)
MediaTek MT8192 SoC has an ARM Mali-G57 MC5 GPU (Valhall-JM). Now that
Panfrost supports AARCH64_4K page table format, let's enable it on this
SoC.

Running glmark2-es2-drm [0] benchmark, reported the same performance
score on both modes Mali LPAE (LEGACY) vs. AARCH64_4K, before and after
this commit. Tested on a Mediatek (MT8395) Genio 1200 EVK board.

[0] https://github.com/glmark2/glmark2

Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Steven Price <steven.price@arm.com>
Link: https://lore.kernel.org/r/20250324185801.168664-7-ariel.dalessandro@collabora.com
drivers/gpu/drm/panfrost/panfrost_drv.c

index f80ec8ef59532f8677dc1f6312da6fd800924d9b..b87f83e94edacd5d979b7a24eeca916c8821e56a 100644 (file)
@@ -836,6 +836,7 @@ static const struct panfrost_compatible mediatek_mt8192_data = {
        .num_pm_domains = ARRAY_SIZE(mediatek_mt8192_pm_domains),
        .pm_domain_names = mediatek_mt8192_pm_domains,
        .pm_features = BIT(GPU_PM_CLK_DIS) | BIT(GPU_PM_VREG_OFF),
+       .gpu_quirks = BIT(GPU_QUIRK_FORCE_AARCH64_PGTABLE),
 };
 
 static const struct of_device_id dt_match[] = {