drm/amd/display: fix dcn2 mpc split decision
authorDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Wed, 3 Apr 2019 18:51:18 +0000 (14:51 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Sat, 22 Jun 2019 14:34:10 +0000 (09:34 -0500)
The split condition is broken and will always activate
at the moment.

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Acked-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c

index 0a11d1098a7edd7600aaf377fc7463732990e62d..ceee0d6b3c26fa551b219ec4e1176bbff2cf2203 100644 (file)
@@ -2103,7 +2103,7 @@ bool dcn20_validate_bandwidth(struct dc *dc, struct dc_state *context,
                        vlevel = vlevel_unsplit;
                        context->bw_ctx.dml.vba.maxMpcComb = 0;
                } else
-                       need_split = context->bw_ctx.dml.vba.NoOfDPP[vlevel][context->bw_ctx.dml.vba.maxMpcComb][pipe_idx];
+                       need_split = context->bw_ctx.dml.vba.NoOfDPP[vlevel][context->bw_ctx.dml.vba.maxMpcComb][pipe_idx] == 2;
 
                if (need_split3d || need_split || force_split) {
                        if (!hsplit_pipe || hsplit_pipe->plane_state != pipe->plane_state) {