drm/amdgpu: Print the IH client ID name when vm fault happens
authorYong Zhao <Yong.Zhao@amd.com>
Fri, 21 Aug 2020 06:01:18 +0000 (14:01 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 24 Mar 2021 02:51:40 +0000 (22:51 -0400)
This gives more information and improves productivity.

Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
drivers/gpu/drm/amd/include/soc15_ih_clientid.h

index afbbec82a289c8300cd823b0e41ed1dc221fb166..eea2bbbbb3df464d08e6d440b234ee6559f49dc4 100644 (file)
 
 #define AMDGPU_WAIT_IDLE_TIMEOUT 200
 
+const char *soc15_ih_clientid_name[] = {
+       "IH",
+       "SDMA2 or ACP",
+       "ATHUB",
+       "BIF",
+       "SDMA3 or DCE",
+       "SDMA4 or ISP",
+       "VMC1 or PCIE0",
+       "RLC",
+       "SDMA0",
+       "SDMA1",
+       "SE0SH",
+       "SE1SH",
+       "SE2SH",
+       "SE3SH",
+       "VCN1 or UVD1",
+       "THM",
+       "VCN or UVD",
+       "SDMA5 or VCE0",
+       "VMC",
+       "SDMA6 or XDMA",
+       "GRBM_CP",
+       "ATS",
+       "ROM_SMUIO",
+       "DF",
+       "SDMA7 or VCE1",
+       "PWR",
+       "UTCL2",
+       "EA",
+       "UTCL2LOG",
+       "MP0",
+       "MP1"
+};
+
 /**
  * amdgpu_hotplug_work_func - work handler for display hotplug event
  *
index 3b7c6c31fce1f17590a11b4b03b0e59db224e37c..58352ca3d4f0ca4852fa19bc1b0086a1e2c8b017 100644 (file)
@@ -152,8 +152,9 @@ static int gmc_v10_0_process_interrupt(struct amdgpu_device *adev,
                entry->src_id, entry->ring_id, entry->vmid,
                entry->pasid, task_info.process_name, task_info.tgid,
                task_info.task_name, task_info.pid);
-       dev_err(adev->dev, "  in page starting at address 0x%012llx from client %d\n",
-               addr, entry->client_id);
+       dev_err(adev->dev, "  in page starting at address 0x%016llx from client 0x%x (%s)\n",
+               addr, entry->client_id,
+               soc15_ih_clientid_name[entry->client_id]);
 
        if (!amdgpu_sriov_vf(adev))
                hub->vmhub_funcs->print_l2_protection_fault_status(adev,
index d9f4955f293ccdcf83c2e87ad99fcd24b37b766d..ff4a2e0a1ad61db5f113beb76e511b8dd814d6e0 100644 (file)
@@ -521,8 +521,9 @@ static int gmc_v9_0_process_interrupt(struct amdgpu_device *adev,
                entry->src_id, entry->ring_id, entry->vmid,
                entry->pasid, task_info.process_name, task_info.tgid,
                task_info.task_name, task_info.pid);
-       dev_err(adev->dev, "  in page starting at address 0x%012llx from client %d\n",
-               addr, entry->client_id);
+       dev_err(adev->dev, "  in page starting at address 0x%016llx from IH client 0x%x (%s)\n",
+               addr, entry->client_id,
+               soc15_ih_clientid_name[entry->client_id]);
 
        if (amdgpu_sriov_vf(adev))
                return 0;
index fb67bb55ed79334f5cce3ac30878f8b6cb419990..e3088c10bfffa22252a542c05254e0bc268225f5 100644 (file)
 #ifndef __SOC15_IH_CLIENTID_H__
 #define __SOC15_IH_CLIENTID_H__
 
- /*
-  * vega10+ IH clients
+/*
+ * Vega10+ IH clients
+ * Whenever this structure is updated, which should not happen, make sure
+ * soc15_ih_clientid_name in the below is also updated accordingly.
  */
 enum soc15_ih_clientid {
        SOC15_IH_CLIENTID_IH            = 0x00,
@@ -74,6 +76,8 @@ enum soc15_ih_clientid {
        SOC15_IH_CLIENTID_VMC1          = SOC15_IH_CLIENTID_PCIE0,
 };
 
+extern const char *soc15_ih_clientid_name[];
+
 #endif