drm/imagination: Mask GPU IRQs in threaded handler

Pass IRQF_ONESHOT flag to request_threaded_irq(), so that interrupts will
be masked by the kernel until the end of the threaded IRQ handler. Since
the calls to pvr_fw_irq_enable() and pvr_fw_irq_disable() are now
redundant, remove them.

Interrupts to the host from the soon-to-be-added RISC-V firmware
processors cannot be masked in hardware. This change allows us to continue
using the threaded handler in GPUs with a RISC-V firmware.

For simplicity, the same approach is taken for all firmware processors.

Signed-off-by: Alessio Belle <alessio.belle@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Link: https://lore.kernel.org/r/20250410-sets-bxs-4-64-patch-v1-v6-6-eda620c5865f@imgtec.com
Signed-off-by: Matt Coster <matt.coster@imgtec.com>

diff --git a/drivers/gpu/drm/imagination/pvr_device.c b/drivers/gpu/drm/imagination/pvr_device.c
index 1704c0268589bdeb65fa6535f9ec63182b0a3e94..b6ce936f07c8bb26d240e50b72a1d991dbe4b045 100644 (file)
--- a/drivers/gpu/drm/imagination/pvr_device.c
+++ b/drivers/gpu/drm/imagination/pvr_device.c
@@ -169,8 +169,6 @@ static irqreturn_t pvr_device_irq_thread_handler(int irq, void *data)
                ret = IRQ_HANDLED;
        }
 
-       /* Unmask FW irqs before returning, so new interrupts can be received. */
-       pvr_fw_irq_enable(pvr_dev);
        return ret;
 }
 
@@ -181,10 +179,6 @@ static irqreturn_t pvr_device_irq_handler(int irq, void *data)
        if (!pvr_fw_irq_pending(pvr_dev))
                return IRQ_NONE; /* Spurious IRQ - ignore. */
 
-       /* Mask the FW interrupts before waking up the thread. Will be unmasked
-        * when the thread handler is done processing events.
-        */
-       pvr_fw_irq_disable(pvr_dev);
        return IRQ_WAKE_THREAD;
 }
 
@@ -213,9 +207,13 @@ pvr_device_irq_init(struct pvr_device *pvr_dev)
        pvr_fw_irq_clear(pvr_dev);
        pvr_fw_irq_enable(pvr_dev);
 
+       /*
+        * The ONESHOT flag ensures IRQs are masked while the thread handler is
+        * running.
+        */
        return request_threaded_irq(pvr_dev->irq, pvr_device_irq_handler,
                                    pvr_device_irq_thread_handler,
-                                   IRQF_SHARED, "gpu", pvr_dev);
+                                   IRQF_SHARED | IRQF_ONESHOT, "gpu", pvr_dev);
 }
 
 /**