drm/amdgpu: Use GPU VA space for IH v4.4.2 in APU

For IH ring buffer and read/write pointers, use GPU VA space rather than
Guest PA on APU configs. Access through Guest PA doesn't work when IOMMU
is enabled. It is also beneficial in NUMA configs as it allocates from
the closest numa pool in a numa enabled system.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/vega20_ih.c b/drivers/gpu/drm/amd/amdgpu/vega20_ih.c
index 536128447b71d6e82fd26ff84ab749ad75963731..17ccf02462abec35e4dc982fd30ef096c255a9fa 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/vega20_ih.c
+++ b/drivers/gpu/drm/amd/amdgpu/vega20_ih.c
@@ -526,6 +526,7 @@ static int vega20_ih_early_init(void *handle)
 static int vega20_ih_sw_init(void *handle)
 {
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       bool use_bus_addr = true;
        int r;
 
        r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_IH, 0,
@@ -533,14 +534,18 @@ static int vega20_ih_sw_init(void *handle)
        if (r)
                return r;
 
-       r = amdgpu_ih_ring_init(adev, &adev->irq.ih, 256 * 1024, true);
+       if ((adev->flags & AMD_IS_APU) &&
+           (adev->ip_versions[OSSSYS_HWIP][0] == IP_VERSION(4, 4, 2)))
+               use_bus_addr = false;
+
+       r = amdgpu_ih_ring_init(adev, &adev->irq.ih, 256 * 1024, use_bus_addr);
        if (r)
                return r;
 
        adev->irq.ih.use_doorbell = true;
        adev->irq.ih.doorbell_index = adev->doorbell_index.ih << 1;
 
-       r = amdgpu_ih_ring_init(adev, &adev->irq.ih1, PAGE_SIZE, true);
+       r = amdgpu_ih_ring_init(adev, &adev->irq.ih1, PAGE_SIZE, use_bus_addr);
        if (r)
                return r;
 
@@ -559,7 +564,7 @@ static int vega20_ih_sw_init(void *handle)
        /* initialize ih control registers offset */
        vega20_ih_init_register_offset(adev);
 
-       r = amdgpu_ih_ring_init(adev, &adev->irq.ih_soft, PAGE_SIZE, true);
+       r = amdgpu_ih_ring_init(adev, &adev->irq.ih_soft, PAGE_SIZE, use_bus_addr);
        if (r)
                return r;