arm64: dts: qcom: rename AOSS QMP nodes
authorKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Tue, 13 Dec 2022 10:19:20 +0000 (11:19 +0100)
committerBjorn Andersson <andersson@kernel.org>
Wed, 11 Jan 2023 04:22:33 +0000 (22:22 -0600)
The Always On Subsystem (AOSS) QMP is not a power domain controller
since commit 135780456218 ("arm64: dts: qcom: sc7180: Use QMP property
to control load state") and few others.  In fact, it was never a power
domain controller but rather control of power state of remote
processors.  This power state control is now handled differently, thus
the AOSS QMP nodes do not have power-domain-cells:

  sc7280-idp.dtb: power-controller@c300000: '#power-domain-cells' is a required property
  From schema: Documentation/devicetree/bindings/power/power-domain.yaml

AOSS QMP is an interface to the actuall AOSS subsystem responsible for
some of power management functions, thus let's call the nodes as
"power-management".

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221213101921.47924-4-krzysztof.kozlowski@linaro.org
arch/arm64/boot/dts/qcom/sc7180.dtsi
arch/arm64/boot/dts/qcom/sc7280.dtsi
arch/arm64/boot/dts/qcom/sc8280xp.dtsi
arch/arm64/boot/dts/qcom/sdm845.dtsi
arch/arm64/boot/dts/qcom/sm6350.dtsi
arch/arm64/boot/dts/qcom/sm8150.dtsi
arch/arm64/boot/dts/qcom/sm8250.dtsi
arch/arm64/boot/dts/qcom/sm8350.dtsi
arch/arm64/boot/dts/qcom/sm8450.dtsi

index 8e449ddea1f27f66a8f93f11a834f8cb174faf9a..ecc272514cd3688361dbc9a50b3338347954122f 100644 (file)
                        #reset-cells = <1>;
                };
 
-               aoss_qmp: power-controller@c300000 {
+               aoss_qmp: power-management@c300000 {
                        compatible = "qcom,sc7180-aoss-qmp", "qcom,aoss-qmp";
                        reg = <0 0x0c300000 0 0x400>;
                        interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
index ff6dc6593ebe77ba5dee54ecba87e1c5518035cf..485e7d1602ec1af5a83339c677ffa6a44f0bcec8 100644 (file)
                        #reset-cells = <1>;
                };
 
-               aoss_qmp: power-controller@c300000 {
+               aoss_qmp: power-management@c300000 {
                        compatible = "qcom,sc7280-aoss-qmp", "qcom,aoss-qmp";
                        reg = <0 0x0c300000 0 0x400>;
                        interrupts-extended = <&ipcc IPCC_CLIENT_AOP
index 1c5dc6bb6bef8f33c1afeefd8c6eee5a583036f1..f1ab043b6a12b0ba2e00ab5a84825a9e5790d8a7 100644 (file)
                        #thermal-sensor-cells = <1>;
                };
 
-               aoss_qmp: power-controller@c300000 {
+               aoss_qmp: power-management@c300000 {
                        compatible = "qcom,sc8280xp-aoss-qmp", "qcom,aoss-qmp";
                        reg = <0 0x0c300000 0 0x400>;
                        interrupts-extended = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP IRQ_TYPE_EDGE_RISING>;
index b711ca3fd7ce2dcbdd27353ba7919bff21ee69e5..0d095fa3023b0474e7da7b3ddd2054f073cc0b9f 100644 (file)
                        #reset-cells = <1>;
                };
 
-               aoss_qmp: power-controller@c300000 {
+               aoss_qmp: power-management@c300000 {
                        compatible = "qcom,sdm845-aoss-qmp", "qcom,aoss-qmp";
                        reg = <0 0x0c300000 0 0x400>;
                        interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
index dcf2e7ccaea717cc7ff39d7cedb467407c9ac2da..837c681319d78497a2170f407c405e53cea75a5d 100644 (file)
                        #thermal-sensor-cells = <1>;
                };
 
-               aoss_qmp: power-controller@c300000 {
+               aoss_qmp: power-management@c300000 {
                        compatible = "qcom,sm6350-aoss-qmp", "qcom,aoss-qmp";
                        reg = <0 0x0c300000 0 0x1000>;
                        interrupts-extended = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP
index 2c59ebe3320dc739d166055d21ac420f62df4e72..c33f3df4c37b72a953b828386f4ada5400fd3ba8 100644 (file)
                        interrupt-controller;
                };
 
-               aoss_qmp: power-controller@c300000 {
+               aoss_qmp: power-management@c300000 {
                        compatible = "qcom,sm8150-aoss-qmp", "qcom,aoss-qmp";
                        reg = <0x0 0x0c300000 0x0 0x400>;
                        interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
index 360f832ed2f52061521f5b5d6687f1856819c3b7..cfa8b68083e8ddab977c31ebf6139693744992c4 100644 (file)
                        #thermal-sensor-cells = <1>;
                };
 
-               aoss_qmp: power-controller@c300000 {
+               aoss_qmp: power-management@c300000 {
                        compatible = "qcom,sm8250-aoss-qmp", "qcom,aoss-qmp";
                        reg = <0 0x0c300000 0 0x400>;
                        interrupts-extended = <&ipcc IPCC_CLIENT_AOP
index 23ee13018015a37be755589d6555060f9edefe0b..ae77dfb6dfdf4ff9d08ac1a2aaf141dc4d439c32 100644 (file)
                        #thermal-sensor-cells = <1>;
                };
 
-               aoss_qmp: power-controller@c300000 {
+               aoss_qmp: power-management@c300000 {
                        compatible = "qcom,sm8350-aoss-qmp", "qcom,aoss-qmp";
                        reg = <0 0x0c300000 0 0x400>;
                        interrupts-extended = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP
index 3037242fab5863e3727c1ebb82d64cea494fd2f0..b892274c9d8377e4f6d811c1d9150949d7d1a3ff 100644 (file)
                        #thermal-sensor-cells = <1>;
                };
 
-               aoss_qmp: power-controller@c300000 {
+               aoss_qmp: power-management@c300000 {
                        compatible = "qcom,sm8450-aoss-qmp", "qcom,aoss-qmp";
                        reg = <0 0x0c300000 0 0x400>;
                        interrupts-extended = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP