drm/amd: Move seamless boot check out of display

This will allow base driver to dictate whether seamless should be
enabled.  No intended functional changes.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 96ea0a43cdd2e4c4ac15495b1886524a38c44f9d..19c757e300b01b0ca9ea632066ff5c154b698be8 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1326,6 +1326,7 @@ int amdgpu_device_gpu_recover(struct amdgpu_device *adev,
 void amdgpu_device_pci_config_reset(struct amdgpu_device *adev);
 int amdgpu_device_pci_reset(struct amdgpu_device *adev);
 bool amdgpu_device_need_post(struct amdgpu_device *adev);
+bool amdgpu_device_seamless_boot_supported(struct amdgpu_device *adev);
 bool amdgpu_device_pcie_dynamic_switching_supported(void);
 bool amdgpu_device_should_use_aspm(struct amdgpu_device *adev);
 bool amdgpu_device_aspm_support_quirk(void);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index ca56b5a543b4a6a1dec0595a515d9b6d939676bb..7187eeb8ffa65d151dd2dae3f9752bddb7f7e788 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -1358,6 +1358,27 @@ bool amdgpu_device_need_post(struct amdgpu_device *adev)
        return true;
 }
 
+/*
+ * Check whether seamless boot is supported.
+ *
+ * So far we only support seamless boot on select ASICs.
+ * If everything goes well, we may consider expanding
+ * seamless boot to other ASICs.
+ */
+bool amdgpu_device_seamless_boot_supported(struct amdgpu_device *adev)
+{
+       switch (adev->ip_versions[DCE_HWIP][0]) {
+       case IP_VERSION(3, 0, 1):
+               if (!adev->mman.keep_stolen_vga_memory)
+                       return true;
+               break;
+       default:
+               break;
+       }
+
+       return false;
+}
+
 /*
  * Intel hosts such as Raptor Lake and Sapphire Rapids don't support dynamic
  * speed switching. Until we have confirmation from Intel that a specific host

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index d9c29d24844a018c480a7cb0b2d69425a1c8dcb4..e8f57ac32b79904626d1c84b3e5a912b28fa98da 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -1680,7 +1680,7 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
 
        init_data.flags.seamless_boot_edp_requested = false;
 
-       if (check_seamless_boot_capability(adev)) {
+       if (amdgpu_device_seamless_boot_supported(adev)) {
                init_data.flags.seamless_boot_edp_requested = true;
                init_data.flags.allow_seamless_boot_optimization = true;
                DRM_INFO("Seamless boot condition check passed\n");
@@ -10993,27 +10993,6 @@ int amdgpu_dm_process_dmub_set_config_sync(
        return ret;
 }
 
-/*
- * Check whether seamless boot is supported.
- *
- * So far we only support seamless boot on CHIP_VANGOGH.
- * If everything goes well, we may consider expanding
- * seamless boot to other ASICs.
- */
-bool check_seamless_boot_capability(struct amdgpu_device *adev)
-{
-       switch (amdgpu_ip_version(adev, DCE_HWIP, 0)) {
-       case IP_VERSION(3, 0, 1):
-               if (!adev->mman.keep_stolen_vga_memory)
-                       return true;
-               break;
-       default:
-               break;
-       }
-
-       return false;
-}
-
 bool dm_execute_dmub_cmd(const struct dc_context *ctx, union dmub_rb_cmd *cmd, enum dm_dmub_wait_type wait_type)
 {
        return dc_dmub_srv_cmd_run(ctx->dmub_srv, cmd, wait_type);

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
index 9e4cc5eeda767e36bd591dff20adf2202dd93119..3d480be802cb5ec478bf98a477698f7a7c72444e 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
@@ -825,8 +825,6 @@ int amdgpu_dm_process_dmub_aux_transfer_sync(struct dc_context *ctx, unsigned in
 int amdgpu_dm_process_dmub_set_config_sync(struct dc_context *ctx, unsigned int link_index,
                                        struct set_config_cmd_payload *payload, enum set_config_status *operation_result);
 
-bool check_seamless_boot_capability(struct amdgpu_device *adev);
-
 struct dc_stream_state *
        create_validate_stream_for_sink(struct amdgpu_dm_connector *aconnector,
                                        const struct drm_display_mode *drm_mode,