drm/i915/adl_s: Update ddi buf translation tables

The hardware team updates the translation tables on 2021-06-23.  Let's
update the driver accordingly.

Bspec: 49291
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210728221045.2363614-1-matthew.d.roper@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
index 63b1ae830d9a0f66a67c2cf9c5f92dcf3759e797..cdd0df4672876acd95e9c516fa6b81267dc72913 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
@@ -1004,13 +1004,13 @@ static const union intel_ddi_buf_trans_entry _adls_combo_phy_ddi_translations_dp
                                                        /* NT mV Trans mV db    */
        { .cnl = { 0xA, 0x35, 0x3F, 0x00, 0x00 } },     /* 350   350      0.0   */
        { .cnl = { 0xA, 0x4F, 0x37, 0x00, 0x08 } },     /* 350   500      3.1   */
-       { .cnl = { 0xC, 0x63, 0x30, 0x00, 0x0F } },     /* 350   700      6.0   */
-       { .cnl = { 0x6, 0x7F, 0x2B, 0x00, 0x14 } },     /* 350   900      8.2   */
+       { .cnl = { 0xC, 0x63, 0x31, 0x00, 0x0E } },     /* 350   700      6.0   */
+       { .cnl = { 0x6, 0x7F, 0x2C, 0x00, 0x13 } },     /* 350   900      8.2   */
        { .cnl = { 0xA, 0x47, 0x3F, 0x00, 0x00 } },     /* 500   500      0.0   */
        { .cnl = { 0xC, 0x63, 0x37, 0x00, 0x08 } },     /* 500   700      2.9   */
-       { .cnl = { 0x6, 0x7F, 0x31, 0x00, 0x0E } },     /* 500   900      5.1   */
-       { .cnl = { 0xC, 0x61, 0x3C, 0x00, 0x03 } },     /* 650   700      0.6   */
-       { .cnl = { 0x6, 0x7B, 0x35, 0x00, 0x0A } },     /* 600   900      3.5   */
+       { .cnl = { 0x6, 0x73, 0x32, 0x00, 0x0D } },     /* 500   900      5.1   */
+       { .cnl = { 0xC, 0x58, 0x3F, 0x00, 0x00 } },     /* 650   700      0.6   */
+       { .cnl = { 0x6, 0x7F, 0x35, 0x00, 0x0A } },     /* 600   900      3.5   */
        { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } },     /* 900   900      0.0   */
 };
 
@@ -1021,16 +1021,16 @@ static const struct intel_ddi_buf_trans adls_combo_phy_ddi_translations_dp_hbr2_
 
 static const union intel_ddi_buf_trans_entry _adls_combo_phy_ddi_translations_edp_hbr2[] = {
                                                        /* NT mV Trans mV db    */
-       { .cnl = { 0x9, 0x70, 0x3C, 0x00, 0x03 } },     /* 200   200      0.0   */
-       { .cnl = { 0x9, 0x6D, 0x3A, 0x00, 0x05 } },     /* 200   250      1.9   */
-       { .cnl = { 0x9, 0x7F, 0x36, 0x00, 0x09 } },     /* 200   300      3.5   */
-       { .cnl = { 0x4, 0x59, 0x32, 0x00, 0x0D } },     /* 200   350      4.9   */
-       { .cnl = { 0x2, 0x77, 0x3A, 0x00, 0x05 } },     /* 250   250      0.0   */
-       { .cnl = { 0x2, 0x7F, 0x38, 0x00, 0x07 } },     /* 250   300      1.6   */
+       { .cnl = { 0x9, 0x73, 0x3D, 0x00, 0x02 } },     /* 200   200      0.0   */
+       { .cnl = { 0x9, 0x7A, 0x3C, 0x00, 0x03 } },     /* 200   250      1.9   */
+       { .cnl = { 0x9, 0x7F, 0x3B, 0x00, 0x04 } },     /* 200   300      3.5   */
+       { .cnl = { 0x4, 0x6C, 0x33, 0x00, 0x0C } },     /* 200   350      4.9   */
+       { .cnl = { 0x2, 0x73, 0x3A, 0x00, 0x05 } },     /* 250   250      0.0   */
+       { .cnl = { 0x2, 0x7C, 0x38, 0x00, 0x07 } },     /* 250   300      1.6   */
        { .cnl = { 0x4, 0x5A, 0x36, 0x00, 0x09 } },     /* 250   350      2.9   */
-       { .cnl = { 0x4, 0x5E, 0x3D, 0x00, 0x04 } },     /* 300   300      0.0   */
+       { .cnl = { 0x4, 0x57, 0x3D, 0x00, 0x02 } },     /* 300   300      0.0   */
        { .cnl = { 0x4, 0x65, 0x38, 0x00, 0x07 } },     /* 300   350      1.3   */
-       { .cnl = { 0x4, 0x6F, 0x3A, 0x00, 0x05 } },     /* 350   350      0.0   */
+       { .cnl = { 0x4, 0x6C, 0x3A, 0x00, 0x05 } },     /* 350   350      0.0   */
 };
 
 static const struct intel_ddi_buf_trans adls_combo_phy_ddi_translations_edp_hbr2 = {
@@ -1040,15 +1040,15 @@ static const struct intel_ddi_buf_trans adls_combo_phy_ddi_translations_edp_hbr2
 
 static const union intel_ddi_buf_trans_entry _adls_combo_phy_ddi_translations_edp_hbr3[] = {
                                                        /* NT mV Trans mV db    */
-       { .cnl = { 0xA, 0x5E, 0x34, 0x00, 0x0B } },     /* 350   350      0.0   */
-       { .cnl = { 0xA, 0x69, 0x32, 0x00, 0x0D } },     /* 350   500      3.1   */
-       { .cnl = { 0xC, 0x74, 0x31, 0x00, 0x0E } },     /* 350   700      6.0   */
-       { .cnl = { 0x6, 0x7F, 0x2E, 0x00, 0x11 } },     /* 350   900      8.2   */
-       { .cnl = { 0xA, 0x5C, 0x3F, 0x00, 0x00 } },     /* 500   500      0.0   */
-       { .cnl = { 0xC, 0x7F, 0x34, 0x00, 0x0B } },     /* 500   700      2.9   */
-       { .cnl = { 0x6, 0x7F, 0x33, 0x00, 0x0C } },     /* 500   900      5.1   */
-       { .cnl = { 0xC, 0x7F, 0x3F, 0x00, 0x00 } },     /* 650   700      0.6   */
-       { .cnl = { 0x6, 0x7F, 0x3C, 0x00, 0x03 } },     /* 600   900      3.5   */
+       { .cnl = { 0xA, 0x35, 0x3F, 0x00, 0x00 } },     /* 350   350      0.0   */
+       { .cnl = { 0xA, 0x4F, 0x37, 0x00, 0x08 } },     /* 350   500      3.1   */
+       { .cnl = { 0xC, 0x63, 0x31, 0x00, 0x0E } },     /* 350   700      6.0   */
+       { .cnl = { 0x6, 0x7F, 0x2C, 0x00, 0x13 } },     /* 350   900      8.2   */
+       { .cnl = { 0xA, 0x47, 0x3F, 0x00, 0x00 } },     /* 500   500      0.0   */
+       { .cnl = { 0xC, 0x63, 0x37, 0x00, 0x08 } },     /* 500   700      2.9   */
+       { .cnl = { 0x6, 0x73, 0x32, 0x00, 0x0D } },     /* 500   900      5.1   */
+       { .cnl = { 0xC, 0x58, 0x3F, 0x00, 0x00 } },     /* 650   700      0.6   */
+       { .cnl = { 0x6, 0x7F, 0x35, 0x00, 0x0A } },     /* 600   900      3.5   */
        { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } },     /* 900   900      0.0   */
 };