arm64: dts: imx8mp: Reorder clock to match fsl,imx6q-pcie.yaml

Reorder the PCIe clock in DT to match YAML DT schema. No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index cd25913a385d9d2b72f1fd12d1d8a691856ac1cf..ffa1331f831f278ab4b2eabe3ba99187e7c289b3 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -1275,9 +1275,9 @@
                        reg = <0x33800000 0x400000>, <0x1ff00000 0x80000>;
                        reg-names = "dbi", "config";
                        clocks = <&clk IMX8MP_CLK_HSIO_ROOT>,
-                                <&clk IMX8MP_CLK_PCIE_ROOT>,
-                                <&clk IMX8MP_CLK_HSIO_AXI>;
-                       clock-names = "pcie", "pcie_aux", "pcie_bus";
+                                <&clk IMX8MP_CLK_HSIO_AXI>,
+                                <&clk IMX8MP_CLK_PCIE_ROOT>;
+                       clock-names = "pcie", "pcie_bus", "pcie_aux";
                        assigned-clocks = <&clk IMX8MP_CLK_PCIE_AUX>;
                        assigned-clock-rates = <10000000>;
                        assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_50M>;