The HSIO blk-ctrl has a internal PLL, which can be used as a reference
clock for the PCIe PHY. Add clock-cells to the binding to allow the
driver to expose this PLL.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
- const: pcie
- const: pcie-phy
+ '#clock-cells':
+ const: 0
+
clocks:
minItems: 2
maxItems: 2
power-domain-names = "bus", "usb", "usb-phy1",
"usb-phy2", "pcie", "pcie-phy";
#power-domain-cells = <1>;
+ #clock-cells = <0>;
};