drm/msm: Add a `preempt_record_size` field
authorAntonino Maniscalco <antomani103@gmail.com>
Thu, 3 Oct 2024 16:12:52 +0000 (18:12 +0200)
committerRob Clark <robdclark@chromium.org>
Thu, 3 Oct 2024 20:18:35 +0000 (13:18 -0700)
Adds a field to `adreno_info` to store the GPU specific preempt record
size.

Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
Tested-by: Rob Clark <robdclark@gmail.com>
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8650-QRD
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8450-HDK
Signed-off-by: Antonino Maniscalco <antomani103@gmail.com>
Patchwork: https://patchwork.freedesktop.org/patch/618015/
Signed-off-by: Rob Clark <robdclark@chromium.org>
drivers/gpu/drm/msm/adreno/a6xx_catalog.c
drivers/gpu/drm/msm/adreno/adreno_gpu.h

index 0312b6ee0356be276fdc7eae1a51a8e585b214c3..5af73b22bfd738b497c6af575cede0e74c1425d6 100644 (file)
@@ -1324,6 +1324,7 @@ static const struct adreno_info a7xx_gpus[] = {
                        .gmu_cgc_mode = 0x00020000,
                },
                .address_space_size = SZ_16G,
+               .preempt_record_size = 2860 * SZ_1K,
        }, {
                .chip_ids = ADRENO_CHIP_IDS(0x43050a01), /* "C510v2" */
                .family = ADRENO_7XX_GEN2,
@@ -1344,6 +1345,7 @@ static const struct adreno_info a7xx_gpus[] = {
                        .gmu_cgc_mode = 0x00020202,
                },
                .address_space_size = SZ_16G,
+               .preempt_record_size = 4192 * SZ_1K,
        }, {
                .chip_ids = ADRENO_CHIP_IDS(0x43050c01), /* "C512v2" */
                .family = ADRENO_7XX_GEN2,
@@ -1363,6 +1365,7 @@ static const struct adreno_info a7xx_gpus[] = {
                        .gmu_cgc_mode = 0x00020202,
                },
                .address_space_size = SZ_256G,
+               .preempt_record_size = 4192 * SZ_1K,
        }, {
                .chip_ids = ADRENO_CHIP_IDS(0x43051401), /* "C520v2" */
                .family = ADRENO_7XX_GEN3,
@@ -1382,6 +1385,7 @@ static const struct adreno_info a7xx_gpus[] = {
                        .gmu_cgc_mode = 0x00020202,
                },
                .address_space_size = SZ_16G,
+               .preempt_record_size = 3572 * SZ_1K,
        }
 };
 DECLARE_ADRENO_GPULIST(a7xx);
index 58d7e7915c575824e7a9e18280d61450a7a953a7..c96e59aa236ac709f5301576b99e66a2461acfa1 100644 (file)
@@ -111,6 +111,7 @@ struct adreno_info {
         * {SHRT_MAX, 0} sentinal.
         */
        struct adreno_speedbin *speedbins;
+       u64 preempt_record_size;
 };
 
 #define ADRENO_CHIP_IDS(tbl...) (uint32_t[]) { tbl, 0 }