iommu/arm-smmu-v3: Add ARM_SMMU_OPT_TEGRA241_CMDQV

The CMDQV extension in NVIDIA Tegra241 SoC only supports CS_NONE in the
CS field of CMD_SYNC. Add a new SMMU option to accommodate that.

Suggested-by: Will Deacon <will@kernel.org>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Signed-off-by: Nicolin Chen <nicolinc@nvidia.com>
Link: https://lore.kernel.org/r/a3cb9bb2429fbae4a59f7ef517614d226763d717.1724970714.git.nicolinc@nvidia.com
Signed-off-by: Will Deacon <will@kernel.org>

diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
index 061a61f4ff0ab421b48e0e34ae2845829bb92e1e..816f5937345aeb108845bbfa9563670fa4ec3b67 100644 (file)
--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
@@ -351,6 +351,15 @@ static struct arm_smmu_cmdq *arm_smmu_get_cmdq(struct arm_smmu_device *smmu)
        return &smmu->cmdq;
 }
 
+static bool arm_smmu_cmdq_needs_busy_polling(struct arm_smmu_device *smmu,
+                                            struct arm_smmu_cmdq *cmdq)
+{
+       if (cmdq == &smmu->cmdq)
+               return false;
+
+       return smmu->options & ARM_SMMU_OPT_TEGRA241_CMDQV;
+}
+
 static void arm_smmu_cmdq_build_sync_cmd(u64 *cmd, struct arm_smmu_device *smmu,
                                         struct arm_smmu_cmdq *cmdq, u32 prod)
 {
@@ -369,6 +378,8 @@ static void arm_smmu_cmdq_build_sync_cmd(u64 *cmd, struct arm_smmu_device *smmu,
        }
 
        arm_smmu_cmdq_build_cmd(cmd, &ent);
+       if (arm_smmu_cmdq_needs_busy_polling(smmu, cmdq))
+               u64p_replace_bits(cmd, CMDQ_SYNC_0_CS_NONE, CMDQ_SYNC_0_CS);
 }
 
 void __arm_smmu_cmdq_skip_err(struct arm_smmu_device *smmu,
@@ -423,6 +434,8 @@ void __arm_smmu_cmdq_skip_err(struct arm_smmu_device *smmu,
 
        /* Convert the erroneous command into a CMD_SYNC */
        arm_smmu_cmdq_build_cmd(cmd, &cmd_sync);
+       if (arm_smmu_cmdq_needs_busy_polling(smmu, cmdq))
+               u64p_replace_bits(cmd, CMDQ_SYNC_0_CS_NONE, CMDQ_SYNC_0_CS);
 
        queue_write(Q_ENT(q, cons), cmd, q->ent_dwords);
 }
@@ -706,7 +719,8 @@ static int arm_smmu_cmdq_poll_until_sync(struct arm_smmu_device *smmu,
                                         struct arm_smmu_cmdq *cmdq,
                                         struct arm_smmu_ll_queue *llq)
 {
-       if (smmu->options & ARM_SMMU_OPT_MSIPOLL)
+       if (smmu->options & ARM_SMMU_OPT_MSIPOLL &&
+           !arm_smmu_cmdq_needs_busy_polling(smmu, cmdq))
                return __arm_smmu_cmdq_poll_until_msi(smmu, cmdq, llq);
 
        return __arm_smmu_cmdq_poll_until_consumed(smmu, cmdq, llq);

diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
index 50efc804f91c8c7b3cbe9b4c2dd9a77b15deccc7..21f034f0ff4c2107bf8315e54ec87a4bc3a31282 100644 (file)
--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
@@ -665,6 +665,7 @@ struct arm_smmu_device {
 #define ARM_SMMU_OPT_PAGE0_REGS_ONLY   (1 << 1)
 #define ARM_SMMU_OPT_MSIPOLL           (1 << 2)
 #define ARM_SMMU_OPT_CMDQ_FORCE_SYNC   (1 << 3)
+#define ARM_SMMU_OPT_TEGRA241_CMDQV    (1 << 4)
        u32                             options;
 
        struct arm_smmu_cmdq            cmdq;