memory: tegra: Fix integer overflow on tick value calculation

Multiplying the Memory Controller clock rate by the tick count results
in an integer overflow and in result the truncated tick value is being
programmed into hardware, such that the GR3D memory client performance is
reduced by two times.

Cc: stable <stable@vger.kernel.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

diff --git a/drivers/memory/tegra/mc.c b/drivers/memory/tegra/mc.c
index 1735e23dbc281873889d4f6aeca7fff8be8016d4..483ac3c1a762a07b738b43b7464152e0103de17c 100644 (file)
--- a/drivers/memory/tegra/mc.c
+++ b/drivers/memory/tegra/mc.c
@@ -285,7 +285,7 @@ static int tegra_mc_setup_latency_allowance(struct tegra_mc *mc)
        u32 value;
 
        /* compute the number of MC clock cycles per tick */
-       tick = mc->tick * clk_get_rate(mc->clk);
+       tick = (unsigned long long)mc->tick * clk_get_rate(mc->clk);
        do_div(tick, NSEC_PER_SEC);
 
        value = readl(mc->regs + MC_EMEM_ARB_CFG);