/* Signal old eviction fence */
amdgpu_eviction_fence_signal(evf_mgr);
+ /* Do not replace eviction fence is fd is getting closed */
+ if (evf_mgr->fd_closing)
+ return;
+
/* Prepare the objects to replace eviction fence */
drm_exec_init(&exec, DRM_EXEC_IGNORE_DUPLICATES, 0);
drm_exec_until_all_locked(&exec) {
{
struct amdgpu_eviction_fence *ev_fence;
+ /* Wait for any pending work to execute */
+ flush_delayed_work(&evf_mgr->suspend_work);
+
spin_lock(&evf_mgr->ev_fence_lock);
ev_fence = evf_mgr->ev_fence;
spin_unlock(&evf_mgr->ev_fence_lock);
amdgpu_bo_unreserve(pd);
}
+ fpriv->evf_mgr.fd_closing = true;
+ amdgpu_userq_mgr_fini(&fpriv->userq_mgr);
amdgpu_eviction_fence_destroy(&fpriv->evf_mgr);
+
amdgpu_ctx_mgr_fini(&fpriv->ctx_mgr);
amdgpu_vm_fini(adev, &fpriv->vm);
- amdgpu_userq_mgr_fini(&fpriv->userq_mgr);
if (pasid)
amdgpu_pasid_free_delayed(pd->tbo.base.resv, pasid);
cancel_delayed_work(&userq_mgr->resume_work);
+ mutex_lock(&userq_mgr->userq_mutex);
idr_for_each_entry(&userq_mgr->userq_idr, queue, queue_id)
amdgpu_userqueue_cleanup(userq_mgr, queue, queue_id);
-
idr_destroy(&userq_mgr->userq_idr);
+ mutex_unlock(&userq_mgr->userq_mutex);
mutex_destroy(&userq_mgr->userq_mutex);
}
return r;
}
+ queue->queue_active = true;
DRM_DEBUG_DRIVER("Queue (doorbell:%d) mapped successfully\n", userq_props->doorbell_index);
return 0;
}
amdgpu_mes_unlock(&adev->mes);
if (r)
DRM_ERROR("Failed to unmap queue in HW, err (%d)\n", r);
+ queue->queue_active = false;
}
static int mes_v11_0_userq_create_ctx_space(struct amdgpu_userq_mgr *uq_mgr,
goto free_ctx;
}
- queue->queue_active = true;
return 0;
free_ctx:
mes_v11_0_userq_mqd_destroy(struct amdgpu_userq_mgr *uq_mgr,
struct amdgpu_usermode_queue *queue)
{
- mes_v11_0_userq_unmap(uq_mgr, queue);
- amdgpu_bo_unref(&queue->wptr_obj.obj);
+ if (queue->queue_active)
+ mes_v11_0_userq_unmap(uq_mgr, queue);
+
amdgpu_userqueue_destroy_object(uq_mgr, &queue->fw_obj);
kfree(queue->userq_prop);
amdgpu_userqueue_destroy_object(uq_mgr, &queue->mqd);
- queue->queue_active = false;
}
static int mes_v11_0_userq_suspend(struct amdgpu_userq_mgr *uq_mgr,