ARM: mediatek: dts: Add uart to mt6592
authorMatthias Brugger <matthias.bgg@gmail.com>
Wed, 14 Jan 2015 08:45:53 +0000 (09:45 +0100)
committerMatthias Brugger <matthias.bgg@gmail.com>
Tue, 20 Jan 2015 17:09:39 +0000 (18:09 +0100)
This patch adds the uart ports and the uart clock to Mediateks
mt6592 SoC.

Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
arch/arm/boot/dts/mt6592.dtsi

index 67c817418392f33a34b913b98e413b4eef46ca6b..c69201ffff721832cdccac36315aee518a7ab50a 100644 (file)
                #clock-cells = <0>;
        };
 
+       uart_clk: dummy26m {
+               compatible = "fixed-clock";
+               clock-frequency = <26000000>;
+               #clock-cells = <0>;
+       };
+
        timer: timer@10008000 {
                compatible = "mediatek,mt6577-timer";
                reg = <0x10008000 0x80>;
                reg = <0x10211000 0x1000>,
                      <0x10212000 0x1000>;
        };
+
+       uart0: serial@11002000 {
+               compatible = "mediatek,mt6577-uart";
+               reg = <0x11002000 0x400>;
+               interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>;
+               clocks = <&uart_clk>;
+               status = "disabled";
+       };
+
+       uart1: serial@11003000 {
+               compatible = "mediatek,mt6577-uart";
+               reg = <0x11003000 0x400>;
+               interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_LOW>;
+               clocks = <&uart_clk>;
+               status = "disabled";
+       };
+
+       uart2: serial@11004000 {
+               compatible = "mediatek,mt6577-uart";
+               reg = <0x11004000 0x400>;
+               interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_LOW>;
+               clocks = <&uart_clk>;
+               status = "disabled";
+       };
+
+       uart3: serial@11005000 {
+               compatible = "mediatek,mt6577-uart";
+               reg = <0x11005000 0x400>;
+               interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_LOW>;
+               clocks = <&uart_clk>;
+               status = "disabled";
+       };
 };