ASoC: SOF: mediatek: Add fw loader and mt8195 dsp ops to load firmware

Add mt8195-loader module with ops callback to load and run firmware
on mt8195 platform.

Signed-off-by: YC Hung <yc.hung@mediatek.com>
Reviewed-by: Péter Ujfalusi <peter.ujfalusi@linux.intel.com>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Reviewed-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Reviewed-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Link: https://lore.kernel.org/r/20211118100749.54628-5-daniel.baluta@oss.nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/sound/soc/sof/mediatek/mt8195/Makefile b/sound/soc/sof/mediatek/mt8195/Makefile
index dd2b6e4affc9f02ec18daefe844883ea66ae5e6e..66cdc0e7bf3cbe8651cba48e3dfd3219857b1462 100644 (file)
--- a/sound/soc/sof/mediatek/mt8195/Makefile
+++ b/sound/soc/sof/mediatek/mt8195/Makefile
@@ -1,3 +1,3 @@
 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
-snd-sof-mt8195-objs := mt8195.o
+snd-sof-mt8195-objs := mt8195.o mt8195-loader.o
 obj-$(CONFIG_SND_SOC_SOF_MT8195) += snd-sof-mt8195.o

diff --git a/sound/soc/sof/mediatek/mt8195/mt8195-loader.c b/sound/soc/sof/mediatek/mt8195/mt8195-loader.c
new file mode 100644 (file)
index 0000000..ed18d63
--- /dev/null
+++ b/sound/soc/sof/mediatek/mt8195/mt8195-loader.c
@@ -0,0 +1,56 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
+//
+// Copyright (c) 2021 Mediatek Corporation. All rights reserved.
+//
+// Author: YC Hung <yc.hung@mediatek.com>
+//
+// Hardware interface for mt8195 DSP code loader
+
+#include <sound/sof.h>
+#include "mt8195.h"
+#include "../../ops.h"
+
+void sof_hifixdsp_boot_sequence(struct snd_sof_dev *sdev, u32 boot_addr)
+{
+       /* ADSP bootup base */
+       snd_sof_dsp_write(sdev, DSP_REG_BAR, DSP_ALTRESETVEC, boot_addr);
+
+       /* pull high RunStall (set bit3 to 1) */
+       snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, DSP_RESET_SW,
+                               ADSP_RUNSTALL, ADSP_RUNSTALL);
+
+       /* pull high StatVectorSel to use AltResetVec (set bit4 to 1) */
+       snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, DSP_RESET_SW,
+                               DSP_RESET_SW, DSP_RESET_SW);
+
+       /* toggle  DReset & BReset */
+       /* pull high DReset & BReset */
+       snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, DSP_RESET_SW,
+                               ADSP_BRESET_SW | ADSP_DRESET_SW,
+                               ADSP_BRESET_SW | ADSP_DRESET_SW);
+
+       /* pull low DReset & BReset */
+       snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, DSP_RESET_SW,
+                               ADSP_BRESET_SW | ADSP_DRESET_SW,
+                               0);
+
+       /* Enable PDebug */
+       snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, DSP_PDEBUGBUS0,
+                               PDEBUG_ENABLE,
+                               PDEBUG_ENABLE);
+
+       /* release RunStall (set bit3 to 0) */
+       snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, DSP_RESET_SW,
+                               ADSP_RUNSTALL, 0);
+}
+
+void sof_hifixdsp_shutdown(struct snd_sof_dev *sdev)
+{
+       /* Clear to 0 firstly */
+       snd_sof_dsp_write(sdev, DSP_REG_BAR, DSP_RESET_SW, 0x0);
+
+       /* RUN_STALL pull high again to reset */
+       snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, DSP_RESET_SW,
+                               ADSP_RUNSTALL, ADSP_RUNSTALL);
+}
+

diff --git a/sound/soc/sof/mediatek/mt8195/mt8195.c b/sound/soc/sof/mediatek/mt8195/mt8195.c
index 966b8660e21c6144d5a814edbea6be310af6a20b..88da6c2de070b8a44c96dd0e681b6181ca1aee82 100644 (file)
--- a/sound/soc/sof/mediatek/mt8195/mt8195.c
+++ b/sound/soc/sof/mediatek/mt8195/mt8195.c
@@ -198,6 +198,17 @@ static int adsp_shared_base_ioremap(struct platform_device *pdev, void *data)
        return 0;
 }
 
+static int mt8195_run(struct snd_sof_dev *sdev)
+{
+       u32 adsp_bootup_addr;
+
+       adsp_bootup_addr = SRAM_PHYS_BASE_FROM_DSP_VIEW;
+       dev_dbg(sdev->dev, "HIFIxDSP boot from base : 0x%08X\n", adsp_bootup_addr);
+       sof_hifixdsp_boot_sequence(sdev, adsp_bootup_addr);
+
+       return 0;
+}
+
 static int mt8195_dsp_probe(struct snd_sof_dev *sdev)
 {
        struct platform_device *pdev = container_of(sdev->dev, struct platform_device, dev);
@@ -294,6 +305,9 @@ const struct snd_sof_dsp_ops sof_mt8195_ops = {
        .probe          = mt8195_dsp_probe,
        .remove         = mt8195_dsp_remove,
 
+       /* DSP core boot */
+       .run            = mt8195_run,
+
        /* Block IO */
        .block_read     = sof_block_read,
        .block_write    = sof_block_write,
@@ -307,6 +321,11 @@ const struct snd_sof_dsp_ops sof_mt8195_ops = {
        /* misc */
        .get_bar_index  = mt8195_get_bar_index,
 
+       /* module loading */
+       .load_module    = snd_sof_parse_module_memcpy,
+       /* firmware loading */
+       .load_firmware  = snd_sof_load_firmware_memcpy,
+
        /* Firmware ops */
        .dsp_arch_ops = &sof_xtensa_arch_ops,
 

diff --git a/sound/soc/sof/mediatek/mt8195/mt8195.h b/sound/soc/sof/mediatek/mt8195/mt8195.h
index 48cbbb5aacb512e5c2b7c2909f726e13f3233085..92942418235724a79b8e87a8e9e0d305c02d5cb0 100644 (file)
--- a/sound/soc/sof/mediatek/mt8195/mt8195.h
+++ b/sound/soc/sof/mediatek/mt8195/mt8195.h
@@ -10,6 +10,7 @@
 #define __MT8195_H
 
 struct mtk_adsp_chip_info;
+struct snd_sof_dev;
 
 #define DSP_REG_BASE                   0x10803000
 #define SCP_CFGREG_BASE                        0x10724000
@@ -152,4 +153,6 @@ struct mtk_adsp_chip_info;
 #define DRAM_REMAP_SHIFT       12
 #define DRAM_REMAP_MASK                (BIT(DRAM_REMAP_SHIFT) - 1)
 
+void sof_hifixdsp_boot_sequence(struct snd_sof_dev *sdev, u32 boot_addr);
+void sof_hifixdsp_shutdown(struct snd_sof_dev *sdev);
 #endif