wifi: mt76: connac: rework TX descriptor and TX free for mt7990
authorShayne Chen <shayne.chen@mediatek.com>
Wed, 9 Apr 2025 14:07:48 +0000 (22:07 +0800)
committerFelix Fietkau <nbd@nbd.name>
Wed, 21 May 2025 12:49:38 +0000 (14:49 +0200)
Adjust the TX descriptor and TX free for updated hardware fields.
This is a preliminary patch to support mt7990 chipset.

Co-developed-by: StanleyYP Wang <StanleyYP.Wang@mediatek.com>
Signed-off-by: StanleyYP Wang <StanleyYP.Wang@mediatek.com>
Co-developed-by: Benjamin Lin <benjamin-jw.lin@mediatek.com>
Signed-off-by: Benjamin Lin <benjamin-jw.lin@mediatek.com>
Co-developed-by: Peter Chiu <chui-hao.chiu@mediatek.com>
Signed-off-by: Peter Chiu <chui-hao.chiu@mediatek.com>
Signed-off-by: Shayne Chen <shayne.chen@mediatek.com>
Link: https://patch.msgid.link/20250409140750.724437-9-shayne.chen@mediatek.com
Signed-off-by: Felix Fietkau <nbd@nbd.name>
drivers/net/wireless/mediatek/mt76/mt76_connac3_mac.h
drivers/net/wireless/mediatek/mt76/mt7996/mac.c

index 487ad716f872adcc30553ecda1606cc0e2dc496a..1013cad57a7ff3ad3ca2ddce8ea94f7ef704fead 100644 (file)
@@ -273,6 +273,7 @@ enum tx_frag_idx {
 #define MT_TXD6_TX_RATE                        GENMASK(21, 16)
 #define MT_TXD6_TIMESTAMP_OFS_EN       BIT(15)
 #define MT_TXD6_TIMESTAMP_OFS_IDX      GENMASK(14, 10)
+#define MT_TXD6_TID_ADDBA              GENMASK(10, 8)
 #define MT_TXD6_MSDU_CNT               GENMASK(9, 4)
 #define MT_TXD6_MSDU_CNT_V2            GENMASK(15, 10)
 #define MT_TXD6_DIS_MAT                        BIT(3)
index d89c06f47997fa9e3de194aa02e3efe83794fdc9..ab9ab48878180058456985db74934e54341e73fa 100644 (file)
@@ -789,10 +789,13 @@ mt7996_mac_write_txwi_80211(struct mt7996_dev *dev, __le32 *txwi,
 
        if (ieee80211_is_action(fc) &&
            mgmt->u.action.category == WLAN_CATEGORY_BACK &&
-           mgmt->u.action.u.addba_req.action_code == WLAN_ACTION_ADDBA_REQ)
+           mgmt->u.action.u.addba_req.action_code == WLAN_ACTION_ADDBA_REQ) {
+               if (is_mt7990(&dev->mt76))
+                       txwi[6] |= cpu_to_le32(FIELD_PREP(MT_TXD6_TID_ADDBA, tid));
                tid = MT_TX_ADDBA;
-       else if (ieee80211_is_mgmt(hdr->frame_control))
+       } else if (ieee80211_is_mgmt(hdr->frame_control)) {
                tid = MT_TX_NORMAL;
+       }
 
        val = FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_802_11) |
              FIELD_PREP(MT_TXD1_HDR_INFO,
@@ -987,12 +990,32 @@ void mt7996_mac_write_txwi(struct mt7996_dev *dev, __le32 *txwi,
        }
 }
 
+static bool
+mt7996_tx_use_mgmt(struct mt7996_dev *dev, struct sk_buff *skb)
+{
+       struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
+
+       if (ieee80211_is_mgmt(hdr->frame_control))
+               return true;
+
+       /* for SDO to bypass specific data frame */
+       if (!mt7996_has_wa(dev)) {
+               if (unlikely(skb->protocol == cpu_to_be16(ETH_P_PAE)))
+                       return true;
+
+               if (ieee80211_has_a4(hdr->frame_control) &&
+                   !ieee80211_is_data_present(hdr->frame_control))
+                       return true;
+       }
+
+       return false;
+}
+
 int mt7996_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
                          enum mt76_txq_id qid, struct mt76_wcid *wcid,
                          struct ieee80211_sta *sta,
                          struct mt76_tx_info *tx_info)
 {
-       struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)tx_info->skb->data;
        struct mt7996_dev *dev = container_of(mdev, struct mt7996_dev, mt76);
        struct ieee80211_tx_info *info = IEEE80211_SKB_CB(tx_info->skb);
        struct ieee80211_key_conf *key = info->control.hw_key;
@@ -1041,7 +1064,7 @@ int mt7996_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
        if (!key)
                txp->fw.flags |= cpu_to_le16(MT_CT_INFO_NONE_CIPHER_FRAME);
 
-       if (!is_8023 && ieee80211_is_mgmt(hdr->frame_control))
+       if (!is_8023 && mt7996_tx_use_mgmt(dev, tx_info->skb))
                txp->fw.flags |= cpu_to_le16(MT_CT_INFO_MGMT_FRAME);
 
        if (vif) {
@@ -1179,6 +1202,7 @@ mt7996_mac_tx_free(struct mt7996_dev *dev, void *data, int len)
        void *end = data + len;
        bool wake = false;
        u16 total, count = 0;
+       u8 ver;
 
        /* clean DMA queues and unmap buffers first */
        mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[MT_TXQ_PSD], false);
@@ -1192,7 +1216,8 @@ mt7996_mac_tx_free(struct mt7996_dev *dev, void *data, int len)
                mt76_queue_tx_cleanup(dev, phy3->q_tx[MT_TXQ_BE], false);
        }
 
-       if (WARN_ON_ONCE(le32_get_bits(tx_free[1], MT_TXFREE1_VER) < 5))
+       ver = le32_get_bits(tx_free[1], MT_TXFREE1_VER);
+       if (WARN_ON_ONCE(ver < 5))
                return;
 
        total = le32_get_bits(tx_free[0], MT_TXFREE0_MSDU_CNT);
@@ -1214,11 +1239,16 @@ mt7996_mac_tx_free(struct mt7996_dev *dev, void *data, int len)
                        wcid = rcu_dereference(dev->mt76.wcid[idx]);
                        sta = wcid_to_sta(wcid);
                        if (!sta)
-                               continue;
+                               goto next;
 
                        msta_link = container_of(wcid, struct mt7996_sta_link,
                                                 wcid);
                        mt76_wcid_add_poll(&dev->mt76, &msta_link->wcid);
+next:
+                       /* ver 7 has a new DW with pair = 1, skip it */
+                       if (ver == 7 && ((void *)(cur_info + 1) < end) &&
+                           (le32_to_cpu(*(cur_info + 1)) & MT_TXFREE_INFO_PAIR))
+                               cur_info++;
                        continue;
                } else if (info & MT_TXFREE_INFO_HEADER) {
                        u32 tx_retries = 0, tx_failed = 0;