arm64: dts: mediatek: add display support for mt8365-evk

MIPI DSI:
- Add "vsys_lcm_reg" regulator support and setup the "mt6357_vsim1_reg",
to power the pannel plugged to the DSI connector.
- Setup the Display Parallel Interface.
  - Add the startek kd070fhfid015 pannel support.

HDMI:
- Add HDMI connector support.
- Add the "ite,it66121" HDMI bridge support, driven by I2C1.
- Setup the Display Parallel Interface.

Fix a typo in the ethernet node.

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com>
Link: https://lore.kernel.org/r/20231023-display-support-v7-6-6703f3e26831@baylibre.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

diff --git a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts
index 44c61094c4d5f8836964758d14bfe398dbf4c42a..1f8584bd66c33744c3a2f29ae9bb19c934588ce0 100644 (file)
--- a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts
+++ b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts
@@ -28,6 +28,21 @@
                stdout-path = "serial0:921600n8";
        };
 
+       connector {
+               compatible = "hdmi-connector";
+               label = "hdmi";
+               type = "d";
+
+               port {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       hdmi_connector_in: endpoint@0 {
+                               reg = <0>;
+                               remote-endpoint = <&hdmi_connector_out>;
+                       };
+               };
+       };
+
        firmware {
                optee {
                        compatible = "linaro,optee-tz";
@@ -105,6 +120,16 @@
                pinctrl-5 = <&aud_mosi_on_pins>;
                mediatek,platform = <&afe>;
        };
+
+       vsys_lcm_reg: regulator-vsys-lcm {
+               compatible = "regulator-fixed";
+               enable-active-high;
+               gpio = <&pio 129 GPIO_ACTIVE_HIGH>;
+               regulator-max-microvolt = <5000000>;
+               regulator-min-microvolt = <5000000>;
+               regulator-name = "vsys_lcm";
+       };
+
 };
 
 &afe {
@@ -132,13 +157,102 @@
        sram-supply = <&mt6357_vsram_proc_reg>;
 };
 
+&dither0_out {
+       remote-endpoint = <&dsi0_in>;
+};
+
+&dpi0 {
+       pinctrl-0 = <&dpi_default_pins>;
+       pinctrl-1 = <&dpi_idle_pins>;
+       pinctrl-names = "default", "sleep";
+       /*
+        * Ethernet and HDMI (DPI0) are sharing pins.
+        * Only one can be enabled at a time and require the physical switch
+        * SW2101 to be set on LAN position
+        */
+       status = "disabled";
+
+       ports {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               port@0 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0>;
+                       dpi0_in: endpoint@1 {
+                               reg = <1>;
+                               remote-endpoint = <&rdma1_out>;
+                       };
+               };
+
+               port@1 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <1>;
+                       dpi0_out: endpoint@1 {
+                               reg = <1>;
+                               remote-endpoint = <&it66121_in>;
+                       };
+               };
+       };
+};
+
+&dsi0 {
+       #address-cells = <1>;
+       #size-cells = <0>;
+       status = "okay";
+
+       panel@0 {
+               compatible = "startek,kd070fhfid015";
+               reg = <0>;
+               enable-gpios = <&pio 67 GPIO_ACTIVE_HIGH>;
+               reset-gpios = <&pio 20 GPIO_ACTIVE_HIGH>;
+               iovcc-supply = <&mt6357_vsim1_reg>;
+               power-supply = <&vsys_lcm_reg>;
+
+               port {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       panel_in: endpoint@0 {
+                               reg = <0>;
+                               remote-endpoint = <&dsi0_out>;
+                       };
+               };
+       };
+       ports {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               port@0 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0>;
+                       dsi0_in: endpoint@0 {
+                               reg = <0>;
+                               remote-endpoint = <&dither0_out>;
+                       };
+               };
+
+               port@1 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <1>;
+                       dsi0_out: endpoint@0 {
+                               reg = <0>;
+                               remote-endpoint = <&panel_in>;
+                       };
+               };
+       };
+};
+
 &ethernet {
        pinctrl-0 = <&ethernet_pins>;
        pinctrl-names = "default";
        phy-handle = <&eth_phy>;
        phy-mode = "rmii";
        /*
-        * Ethernet and HDMI (DSI0) are sharing pins.
+        * Ethernet and HDMI (DPI0) are sharing pins.
         * Only one can be enabled at a time and require the physical switch
         * SW2101 to be set on LAN position
         * mt6357_vibr_reg and mt6357_vsim2_reg are needed to supply ethernet
@@ -162,6 +276,56 @@
        status = "okay";
 };
 
+&i2c1 {
+       #address-cells = <1>;
+       #size-cells = <0>;
+       clock-div = <2>;
+       clock-frequency = <100000>;
+       pinctrl-0 = <&i2c1_pins>;
+       pinctrl-names = "default";
+       status = "okay";
+
+       it66121_hdmi: hdmi@4c {
+               compatible = "ite,it66121";
+               reg = <0x4c>;
+               #sound-dai-cells = <0>;
+               interrupt-parent = <&pio>;
+               interrupts = <68 IRQ_TYPE_LEVEL_LOW>;
+               pinctrl-0 = <&ite_pins>;
+               pinctrl-names = "default";
+               reset-gpios = <&pio 69 GPIO_ACTIVE_LOW>;
+               vcn18-supply = <&mt6357_vsim2_reg>;
+               vcn33-supply = <&mt6357_vibr_reg>;
+               vrf12-supply = <&mt6357_vrf12_reg>;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               reg = <0>;
+                               it66121_in: endpoint@0 {
+                                       reg = <0>;
+                                       bus-width = <12>;
+                                       remote-endpoint = <&dpi0_out>;
+                               };
+                       };
+
+                       port@1 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               reg = <1>;
+                               hdmi_connector_out: endpoint@0 {
+                                       reg = <0>;
+                                       remote-endpoint = <&hdmi_connector_in>;
+                               };
+                       };
+               };
+       };
+};
+
 &mmc0 {
        assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL>;
        assigned-clocks = <&topckgen CLK_TOP_MSDC50_0_SEL>;
@@ -206,6 +370,11 @@
        mediatek,micbias1-microvolt = <1700000>;
 };
 
+&mt6357_vsim1_reg {
+       regulator-min-microvolt = <1800000>;
+       regulator-max-microvolt = <1800000>;
+};
+
 &pio {
        aud_default_pins: audiodefault-pins {
                clk-dat-pins {
@@ -268,6 +437,49 @@
                };
        };
 
+       dpi_default_pins: dpi-default-pins {
+               pins {
+                       pinmux = <MT8365_PIN_0_GPIO0__FUNC_DPI_D0>,
+                                <MT8365_PIN_1_GPIO1__FUNC_DPI_D1>,
+                                <MT8365_PIN_2_GPIO2__FUNC_DPI_D2>,
+                                <MT8365_PIN_3_GPIO3__FUNC_DPI_D3>,
+                                <MT8365_PIN_4_GPIO4__FUNC_DPI_D4>,
+                                <MT8365_PIN_5_GPIO5__FUNC_DPI_D5>,
+                                <MT8365_PIN_6_GPIO6__FUNC_DPI_D6>,
+                                <MT8365_PIN_7_GPIO7__FUNC_DPI_D7>,
+                                <MT8365_PIN_8_GPIO8__FUNC_DPI_D8>,
+                                <MT8365_PIN_9_GPIO9__FUNC_DPI_D9>,
+                                <MT8365_PIN_10_GPIO10__FUNC_DPI_D10>,
+                                <MT8365_PIN_11_GPIO11__FUNC_DPI_D11>,
+                                <MT8365_PIN_12_GPIO12__FUNC_DPI_DE>,
+                                <MT8365_PIN_13_GPIO13__FUNC_DPI_VSYNC>,
+                                <MT8365_PIN_14_GPIO14__FUNC_DPI_CK>,
+                                <MT8365_PIN_15_GPIO15__FUNC_DPI_HSYNC>;
+                       drive-strength = <4>;
+               };
+       };
+
+       dpi_idle_pins: dpi-idle-pins {
+               pins {
+                       pinmux = <MT8365_PIN_0_GPIO0__FUNC_GPIO0>,
+                                <MT8365_PIN_1_GPIO1__FUNC_GPIO1>,
+                                <MT8365_PIN_2_GPIO2__FUNC_GPIO2>,
+                                <MT8365_PIN_3_GPIO3__FUNC_GPIO3>,
+                                <MT8365_PIN_4_GPIO4__FUNC_GPIO4>,
+                                <MT8365_PIN_5_GPIO5__FUNC_GPIO5>,
+                                <MT8365_PIN_6_GPIO6__FUNC_GPIO6>,
+                                <MT8365_PIN_7_GPIO7__FUNC_GPIO7>,
+                                <MT8365_PIN_8_GPIO8__FUNC_GPIO8>,
+                                <MT8365_PIN_9_GPIO9__FUNC_GPIO9>,
+                                <MT8365_PIN_10_GPIO10__FUNC_GPIO10>,
+                                <MT8365_PIN_11_GPIO11__FUNC_GPIO11>,
+                                <MT8365_PIN_12_GPIO12__FUNC_GPIO12>,
+                                <MT8365_PIN_13_GPIO13__FUNC_GPIO13>,
+                                <MT8365_PIN_14_GPIO14__FUNC_GPIO14>,
+                                <MT8365_PIN_15_GPIO15__FUNC_GPIO15>;
+               };
+       };
+
        ethernet_pins: ethernet-pins {
                phy_reset_pins {
                        pinmux = <MT8365_PIN_133_TDM_TX_DATA1__FUNC_GPIO133>;
@@ -309,6 +521,33 @@
                };
        };
 
+       i2c1_pins: i2c1-pins {
+               pins {
+                       pinmux = <MT8365_PIN_59_SDA1__FUNC_SDA1_0>,
+                                <MT8365_PIN_60_SCL1__FUNC_SCL1_0>;
+                       bias-pull-up;
+               };
+       };
+
+       ite_pins: ite-pins {
+               irq_ite_pins {
+                       pinmux = <MT8365_PIN_68_CMDAT0__FUNC_GPIO68>;
+                       input-enable;
+                       bias-pull-up;
+               };
+
+               pwr_pins {
+                       pinmux = <MT8365_PIN_70_CMDAT2__FUNC_GPIO70>,
+                                <MT8365_PIN_71_CMDAT3__FUNC_GPIO71>;
+                       output-high;
+               };
+
+               rst_ite_pins {
+                       pinmux = <MT8365_PIN_69_CMDAT1__FUNC_GPIO69>;
+                       output-high;
+               };
+       };
+
        mmc0_default_pins: mmc0-default-pins {
                clk-pins {
                        pinmux = <MT8365_PIN_99_MSDC0_CLK__FUNC_MSDC0_CLK>;
@@ -464,6 +703,10 @@
        status = "okay";
 };
 
+&rdma1_out {
+       remote-endpoint = <&dpi0_in>;
+};
+
 &ssusb {
        dr_mode = "otg";
        maximum-speed = "high-speed";