clk: sprd: Fix thm_parents incorrect configuration
authorZhifeng Tang <zhifeng.tang@unisoc.com>
Thu, 24 Aug 2023 09:26:24 +0000 (17:26 +0800)
committerStephen Boyd <sboyd@kernel.org>
Mon, 11 Sep 2023 20:50:49 +0000 (13:50 -0700)
The thm*_clk have two clock sources 32k and 250k,excluding 32m.

Fixes: af3bd36573e3 ("clk: sprd: Add clocks support for UMS512")
Signed-off-by: Zhifeng Tang <zhifeng.tang@unisoc.com>
Acked-by: Chunyan Zhang <zhang.lyra@gmail.com>
Reviewed-by: Baolin Wang <baolin.wang@linux.alibaba.com>
Link: https://lore.kernel.org/r/20230824092624.20020-1-zhifeng.tang@unisoc.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/sprd/ums512-clk.c

index 8f4441dd572b2156cf568e62e84bfe7b7002b8ee..9384ecc6c7413867c432623377091857946acad5 100644 (file)
@@ -800,7 +800,7 @@ static SPRD_MUX_CLK_DATA(uart1_clk, "uart1-clk", uart_parents,
                         0x250, 0, 3, UMS512_MUX_FLAG);
 
 static const struct clk_parent_data thm_parents[] = {
-       { .fw_name = "ext-32m" },
+       { .fw_name = "ext-32k" },
        { .hw = &clk_250k.hw  },
 };
 static SPRD_MUX_CLK_DATA(thm0_clk, "thm0-clk", thm_parents,