Merge branch 'for-5.18/amd-sfh' into for-linus
authorJiri Kosina <jkosina@suse.cz>
Wed, 23 Mar 2022 08:58:40 +0000 (09:58 +0100)
committerJiri Kosina <jkosina@suse.cz>
Wed, 23 Mar 2022 08:58:40 +0000 (09:58 +0100)
- dead code elimination (Christophe JAILLET)

1  2 
drivers/hid/amd-sfh-hid/amd_sfh_pcie.c

index 19fa734a9a793a7e86c1913b67a50a93be671f53,673536d1d9ba76e53d68418a61d696d1f1551604..6b5fd90b0bd1b89a937d81b483cb1841ce65f369
@@@ -37,11 -37,11 +37,11 @@@ static int amd_sfh_wait_response_v2(str
  {
        union cmd_response cmd_resp;
  
 -      /* Get response with status within a max of 800 ms timeout */
 +      /* Get response with status within a max of 1600 ms timeout */
        if (!readl_poll_timeout(mp2->mmio + AMD_P2C_MSG(0), cmd_resp.resp,
                                (cmd_resp.response_v2.response == sensor_sts &&
                                cmd_resp.response_v2.status == 0 && (sid == 0xff ||
 -                              cmd_resp.response_v2.sensor_id == sid)), 500, 800000))
 +                              cmd_resp.response_v2.sensor_id == sid)), 500, 1600000))
                return cmd_resp.response_v2.response;
  
        return SENSOR_DISABLED;
@@@ -53,7 -53,6 +53,7 @@@ static void amd_start_sensor_v2(struct 
  
        cmd_base.ul = 0;
        cmd_base.cmd_v2.cmd_id = ENABLE_SENSOR;
 +      cmd_base.cmd_v2.intr_disable = 1;
        cmd_base.cmd_v2.period = info.period;
        cmd_base.cmd_v2.sensor_id = info.sensor_idx;
        cmd_base.cmd_v2.length = 16;
@@@ -71,7 -70,6 +71,7 @@@ static void amd_stop_sensor_v2(struct a
  
        cmd_base.ul = 0;
        cmd_base.cmd_v2.cmd_id = DISABLE_SENSOR;
 +      cmd_base.cmd_v2.intr_disable = 1;
        cmd_base.cmd_v2.period = 0;
        cmd_base.cmd_v2.sensor_id = sensor_idx;
        cmd_base.cmd_v2.length  = 16;
@@@ -85,51 -83,12 +85,51 @@@ static void amd_stop_all_sensor_v2(stru
        union sfh_cmd_base cmd_base;
  
        cmd_base.cmd_v2.cmd_id = STOP_ALL_SENSORS;
 +      cmd_base.cmd_v2.intr_disable = 1;
        cmd_base.cmd_v2.period = 0;
        cmd_base.cmd_v2.sensor_id = 0;
  
        writel(cmd_base.ul, privdata->mmio + AMD_C2P_MSG0);
  }
  
 +static void amd_sfh_clear_intr_v2(struct amd_mp2_dev *privdata)
 +{
 +      if (readl(privdata->mmio + AMD_P2C_MSG(4))) {
 +              writel(0, privdata->mmio + AMD_P2C_MSG(4));
 +              writel(0xf, privdata->mmio + AMD_P2C_MSG(5));
 +      }
 +}
 +
 +static void amd_sfh_clear_intr(struct amd_mp2_dev *privdata)
 +{
 +      if (privdata->mp2_ops->clear_intr)
 +              privdata->mp2_ops->clear_intr(privdata);
 +}
 +
 +static irqreturn_t amd_sfh_irq_handler(int irq, void *data)
 +{
 +      amd_sfh_clear_intr(data);
 +
 +      return IRQ_HANDLED;
 +}
 +
 +static int amd_sfh_irq_init_v2(struct amd_mp2_dev *privdata)
 +{
 +      int rc;
 +
 +      pci_intx(privdata->pdev, true);
 +
 +      rc = devm_request_irq(&privdata->pdev->dev, privdata->pdev->irq,
 +                            amd_sfh_irq_handler, 0, DRIVER_NAME, privdata);
 +      if (rc) {
 +              dev_err(&privdata->pdev->dev, "failed to request irq %d err=%d\n",
 +                      privdata->pdev->irq, rc);
 +              return rc;
 +      }
 +
 +      return 0;
 +}
 +
  void amd_start_sensor(struct amd_mp2_dev *privdata, struct amd_mp2_sensor_info info)
  {
        union sfh_cmd_param cmd_param;
@@@ -234,8 -193,6 +234,8 @@@ static void amd_mp2_pci_remove(void *pr
        struct amd_mp2_dev *mp2 = privdata;
        amd_sfh_hid_client_deinit(privdata);
        mp2->mp2_ops->stop_all(mp2);
 +      pci_intx(mp2->pdev, false);
 +      amd_sfh_clear_intr(mp2);
  }
  
  static const struct amd_mp2_ops amd_sfh_ops_v2 = {
        .stop = amd_stop_sensor_v2,
        .stop_all = amd_stop_all_sensor_v2,
        .response = amd_sfh_wait_response_v2,
 +      .clear_intr = amd_sfh_clear_intr_v2,
 +      .init_intr = amd_sfh_irq_init_v2,
  };
  
  static const struct amd_mp2_ops amd_sfh_ops = {
@@@ -270,14 -225,6 +270,14 @@@ static void mp2_select_ops(struct amd_m
        }
  }
  
 +static int amd_sfh_irq_init(struct amd_mp2_dev *privdata)
 +{
 +      if (privdata->mp2_ops->init_intr)
 +              return privdata->mp2_ops->init_intr(privdata);
 +
 +      return 0;
 +}
 +
  static int amd_mp2_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  {
        struct amd_mp2_dev *privdata;
        pci_set_master(pdev);
        rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
        if (rc) {
-               rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
-               if (rc) {
-                       dev_err(&pdev->dev, "failed to set DMA mask\n");
-                       return rc;
-               }
+               dev_err(&pdev->dev, "failed to set DMA mask\n");
+               return rc;
        }
  
        privdata->cl_data = devm_kzalloc(&pdev->dev, sizeof(struct amdtp_cl_data), GFP_KERNEL);
  
        mp2_select_ops(privdata);
  
 +      rc = amd_sfh_irq_init(privdata);
 +      if (rc) {
 +              dev_err(&pdev->dev, "amd_sfh_irq_init failed\n");
 +              return rc;
 +      }
 +
        rc = amd_sfh_hid_client_init(privdata);
 -      if (rc)
 +      if (rc) {
 +              amd_sfh_clear_intr(privdata);
 +              dev_err(&pdev->dev, "amd_sfh_hid_client_init failed\n");
                return rc;
 +      }
 +
 +      amd_sfh_clear_intr(privdata);
  
        return devm_add_action_or_reset(&pdev->dev, amd_mp2_pci_remove, privdata);
  }
@@@ -354,9 -287,6 +351,9 @@@ static int __maybe_unused amd_mp2_pci_r
                }
        }
  
 +      schedule_delayed_work(&cl_data->work_buffer, msecs_to_jiffies(AMD_SFH_IDLE_LOOP));
 +      amd_sfh_clear_intr(mp2);
 +
        return 0;
  }
  
@@@ -379,9 -309,6 +376,9 @@@ static int __maybe_unused amd_mp2_pci_s
                }
        }
  
 +      cancel_delayed_work_sync(&cl_data->work_buffer);
 +      amd_sfh_clear_intr(mp2);
 +
        return 0;
  }