arm64: dts: Update cache properties for marvell

The DeviceTree Specification v0.3 specifies that the cache node
'compatible' and 'cache-level' properties are 'required'. Cf.
s3.8 Multi-level and Shared Cache Nodes

The recently added init_of_cache_level() function checks
these properties. Add them if missing.

Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>

diff --git a/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi b/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi
index 44ed6f963b75abbe68f2e8e7c73ebe19468242d8..7308f7b6b22c94e72d7336ee6ccf0c41050b18d4 100644 (file)
--- a/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi
+++ b/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi
@@ -49,6 +49,7 @@
 
                l2: l2-cache {
                        compatible = "cache";
+                       cache-level = <2>;
                };
        };
 

diff --git a/arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi b/arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi
index fcab5173fe6704139cbe772785911ea05d2b887d..990f70303fe6fd18b426a0f4795a06849fbc5b4d 100644 (file)
--- a/arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi
@@ -51,6 +51,7 @@
                        cache-size = <0x80000>;
                        cache-line-size = <64>;
                        cache-sets = <512>;
+                       cache-level = <2>;
                };
        };
 

diff --git a/arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi b/arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi
index 3db427122f9e7650132596d5580ec16add691535..a7b8e001cc9c1fdf7f1b3d9e4c3021c79f5650db 100644 (file)
--- a/arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi
@@ -81,6 +81,7 @@
                        cache-size = <0x80000>;
                        cache-line-size = <64>;
                        cache-sets = <512>;
+                       cache-level = <2>;
                };
 
                l2_1: l2-cache1 {
@@ -88,6 +89,7 @@
                        cache-size = <0x80000>;
                        cache-line-size = <64>;
                        cache-sets = <512>;
+                       cache-level = <2>;
                };
        };
 };

diff --git a/arch/arm64/boot/dts/marvell/armada-ap807-quad.dtsi b/arch/arm64/boot/dts/marvell/armada-ap807-quad.dtsi
index 68782f161f12224f3ec7a79e60d1d61f3d204b20..7740098fd108b82ceb62912dae39f8234c5504b2 100644 (file)
--- a/arch/arm64/boot/dts/marvell/armada-ap807-quad.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-ap807-quad.dtsi
@@ -81,6 +81,7 @@
                        cache-size = <0x80000>;
                        cache-line-size = <64>;
                        cache-sets = <512>;
+                       cache-level = <2>;
                };
 
                l2_1: l2-cache1 {
@@ -88,6 +89,7 @@
                        cache-size = <0x80000>;
                        cache-line-size = <64>;
                        cache-sets = <512>;
+                       cache-level = <2>;
                };
        };
 };