dt-bindings: mediatek: add rdma-fifo-size description for mt8183 display
authorYongqiang Niu <yongqiang.niu@mediatek.com>
Thu, 7 Jan 2021 03:11:11 +0000 (11:11 +0800)
committerChun-Kuang Hu <chunkuang.hu@kernel.org>
Thu, 4 Feb 2021 14:53:39 +0000 (22:53 +0800)
rdma fifo size may be different even in same SOC, add this
property to the corresponding rdma

Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt

index c40f900de59d460aa34ab10eb69e80d33705bb45..d6f03ad4b47525ce8dfcb2cdd6ff02cf9f23e051 100644 (file)
@@ -66,6 +66,14 @@ Required properties (DMA function blocks):
   argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
   for details.
 
+Optional properties (RDMA function blocks):
+- mediatek,rdma-fifo-size: rdma fifo size may be different even in same SOC, add this
+  property to the corresponding rdma
+  the value is the Max value which defined in hardware data sheet.
+  mediatek,rdma-fifo-size of mt8173-rdma0 is 8K
+  mediatek,rdma-fifo-size of mt8183-rdma0 is 5K
+  mediatek,rdma-fifo-size of mt8183-rdma1 is 2K
+
 Examples:
 
 mmsys: clock-controller@14000000 {
@@ -103,6 +111,7 @@ rdma0: rdma@1400e000 {
        clocks = <&mmsys CLK_MM_DISP_RDMA0>;
        iommus = <&iommu M4U_PORT_DISP_RDMA0>;
        mediatek,larb = <&larb0>;
+       mediatek,rdma-fifosize = <8192>;
 };
 
 rdma1: rdma@1400f000 {