usb: cdns3: gadget: set fast access bit

Below is the recommendation from Cadence designer:
	Using this bit to be sure that PHY clock is keeping up in active
	state. It's good to keep Fast Access bit enabled as long as there
	is any access to USB register.

It is used to fix the potential ARM core hang when visit controller
register after DEVDS (.pullup is cleared) is set, the threaded irq
may be scheduled at that time.

Cc: Pawel Laszczak <pawell@cadence.com>
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Felipe Balbi <balbi@kernel.org>

diff --git a/drivers/usb/cdns3/gadget.c b/drivers/usb/cdns3/gadget.c
index 9e6ff7d00784a38bda8b4c1967e72aa65bb184ae..081447bf731341ea66503e3f85cd7f89fd2d8b52 100644 (file)
--- a/drivers/usb/cdns3/gadget.c
+++ b/drivers/usb/cdns3/gadget.c
@@ -2783,6 +2783,8 @@ static void cdns3_gadget_config(struct cdns3_device *priv_dev)
        /* enable generic interrupt*/
        writel(USB_IEN_INIT, &regs->usb_ien);
        writel(USB_CONF_CLK2OFFDS | USB_CONF_L1DS, &regs->usb_conf);
+       /*  keep Fast Access bit */
+       writel(PUSB_PWR_FST_REG_ACCESS, &priv_dev->regs->usb_pwr);
 
        cdns3_configure_dmult(priv_dev, NULL);
 }
@@ -2866,6 +2868,7 @@ static int cdns3_gadget_udc_stop(struct usb_gadget *gadget)
 
        /* disable interrupt for device */
        writel(0, &priv_dev->regs->usb_ien);
+       writel(0, &priv_dev->regs->usb_pwr);
        writel(USB_CONF_DEVDS, &priv_dev->regs->usb_conf);
 
        return 0;