arm64: dts: renesas: white-hawk: ethernet: Describe AVB1 and AVB2

Describe the two Marvell 88Q2110/QFN40 PHYs available on the R-Car V4H
White Hawk RAVB/Ethernet(1000Base-T1) sub-board. The two PHYs are wired
up on the board by default, there is no need to move any resistors which
are needed to access other PHYs available on this sub-board.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240413141806.300989-3-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/white-hawk-ethernet.dtsi b/arch/arm64/boot/dts/renesas/white-hawk-ethernet.dtsi
index a218fda337cf4308f8ec90b0ed14c2a064facd10..595ec4ff4cdd0190794af63c847821e284597b12 100644 (file)
--- a/arch/arm64/boot/dts/renesas/white-hawk-ethernet.dtsi
+++ b/arch/arm64/boot/dts/renesas/white-hawk-ethernet.dtsi
@@ -6,6 +6,57 @@
  * Copyright (C) 2022 Glider bv
  */
 
+/ {
+       aliases {
+               ethernet1 = &avb1;
+               ethernet2 = &avb2;
+       };
+};
+
+&avb1 {
+       pinctrl-0 = <&avb1_pins>;
+       pinctrl-names = "default";
+       phy-handle = <&avb1_phy>;
+       status = "okay";
+
+       mdio {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               reset-gpios = <&gpio6 1 GPIO_ACTIVE_LOW>;
+               reset-post-delay-us = <4000>;
+
+               avb1_phy: ethernet-phy@0 {
+                       compatible = "ethernet-phy-ieee802.3-c45";
+                       reg = <0>;
+                       interrupt-parent = <&gpio6>;
+                       interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
+               };
+       };
+};
+
+&avb2 {
+       pinctrl-0 = <&avb2_pins>;
+       pinctrl-names = "default";
+       phy-handle = <&avb2_phy>;
+       status = "okay";
+
+       mdio {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               reset-gpios = <&gpio5 5 GPIO_ACTIVE_LOW>;
+               reset-post-delay-us = <4000>;
+
+               avb2_phy: ethernet-phy@0 {
+                       compatible = "ethernet-phy-ieee802.3-c45";
+                       reg = <0>;
+                       interrupt-parent = <&gpio5>;
+                       interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
+               };
+       };
+};
+
 &i2c0 {
        eeprom@53 {
                compatible = "rohm,br24g01", "atmel,24c01";
@@ -14,3 +65,55 @@
                pagesize = <8>;
        };
 };
+
+&pfc {
+       avb1_pins: avb1 {
+               mux {
+                       groups = "avb1_link", "avb1_mdio", "avb1_rgmii",
+                                "avb1_txcrefclk";
+                       function = "avb1";
+               };
+
+               mdio {
+                       groups = "avb1_mdio";
+                       drive-strength = <24>;
+                       bias-disable;
+               };
+
+               rgmii {
+                       groups = "avb1_rgmii";
+                       drive-strength = <24>;
+                       bias-disable;
+               };
+
+               link {
+                       groups = "avb1_link";
+                       bias-disable;
+               };
+       };
+
+       avb2_pins: avb2 {
+               mux {
+                       groups = "avb2_link", "avb2_mdio", "avb2_rgmii",
+                                "avb2_txcrefclk";
+                       function = "avb2";
+               };
+
+               mdio {
+                       groups = "avb2_mdio";
+                       drive-strength = <24>;
+                       bias-disable;
+               };
+
+               rgmii {
+                       groups = "avb2_rgmii";
+                       drive-strength = <24>;
+                       bias-disable;
+               };
+
+               link {
+                       groups = "avb2_link";
+                       bias-disable;
+               };
+       };
+};