drm/ast: Refactor ast_post_gpu() by Gen
authorThomas Zimmermann <tzimmermann@suse.de>
Fri, 17 Jan 2025 10:29:08 +0000 (11:29 +0100)
committerThomas Zimmermann <tzimmermann@suse.de>
Wed, 22 Jan 2025 12:52:48 +0000 (13:52 +0100)
Reorganize ast_post_gpu() so that it first branches by Gen and then
by config mode and TX chip. This will later make it possible to split
up the function by Gen.

The helper ast_init_3rdtx() only handles Gen4 and Gen5, so leave it
out from the other Gens.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250117103450.28692-4-tzimmermann@suse.de
drivers/gpu/drm/ast/ast_post.c

index 364030f97571d7fc1b11713c929d7279fa5b1137..49f661760f9e57a5db84888b13ebde27fbf171da 100644 (file)
@@ -344,21 +344,37 @@ void ast_post_gpu(struct ast_device *ast)
 {
        ast_set_def_ext_reg(ast);
 
-       if (IS_AST_GEN7(ast)) {
+       if (AST_GEN(ast) >= 7) {
                if (ast->tx_chip == AST_TX_ASTDP)
                        ast_dp_launch(ast);
-       } else if (ast->config_mode == ast_use_p2a) {
-               if (IS_AST_GEN6(ast))
+       } else if (AST_GEN(ast) >= 6) {
+               if (ast->config_mode == ast_use_p2a) {
                        ast_post_chip_2500(ast);
-               else if (IS_AST_GEN5(ast) || IS_AST_GEN4(ast))
+               } else {
+                       if (ast->tx_chip == AST_TX_SIL164) {
+                               /* Enable DVO */
+                               ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xa3, 0xcf, 0x80);
+                       }
+               }
+       } else if (AST_GEN(ast) >= 4) {
+               if (ast->config_mode == ast_use_p2a) {
                        ast_post_chip_2300(ast);
-               else
+                       ast_init_3rdtx(ast);
+               } else {
+                       if (ast->tx_chip == AST_TX_SIL164) {
+                               /* Enable DVO */
+                               ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xa3, 0xcf, 0x80);
+                       }
+               }
+       } else  {
+               if (ast->config_mode == ast_use_p2a) {
                        ast_init_dram_reg(ast);
-
-               ast_init_3rdtx(ast);
-       } else {
-               if (ast->tx_chip == AST_TX_SIL164)
-                       ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xa3, 0xcf, 0x80);   /* Enable DVO */
+               } else {
+                       if (ast->tx_chip == AST_TX_SIL164) {
+                               /* Enable DVO */
+                               ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xa3, 0xcf, 0x80);
+                       }
+               }
        }
 }